Network-on-Chip (NoC) Team Engineering DirectorID:58599
25,000 MYR ~ 40,000 MYRBayan Lepas, Bayan Baru约18小时 ago概述
薪资
25,000 MYR ~ 40,000 MYR
产业类别
Software/Information Processing, IT/Telecommunications, Manufacturing(Computer/Telecommunication), Manufacturing(Electronics/Semiconductors)
工作内容
This role will lead the architecture, design, and development of high-performance interconnect solutions for SoCs, chiplets, and advanced packaging systems. The ideal candidate will have deep expertise in NoC architecture, RTL/micro-architecture design, performance modeling, and verification, combined with strong leadership skills. Experience in both hardware and software development is a strong plus, as it enables system-level optimization, modeling, and seamless HW/SW co-design for next-generation NoC solutions. The NoC Team Director will drive technical strategy, manage execution, mentor a multidisciplinary team, and collaborate with cross-functional partners to deliver state-of-the-art interconnect IP for data-intensive and AI-driven applications.
Key Responsibilities
1. Leadership & Strategy
• Define and execute the company’s NoC technology roadmap, aligned with product and system- level requirements.
• Build, mentor, and lead a high-performing team of architects, designers, verification engineers, and performance modelers.
• Foster innovation in NoC design, methodology, and automation to achieve best-in-class power, performance, and area (PPA).
2. NoC Architecture & Design
• Lead the design of scalable, configurable, and high-bandwidth NoC architectures for heterogeneous SoCs and multi-die systems.
• Drive micro-architecture, RTL design, and integration of NoC subsystems, including coherency, QoS, and security features.
• Oversee performance modeling, traffic analysis, and system-level simulation to ensure NoC meets latency and bandwidth requirements.
• Collaborate with physical design teams to optimize NoC topology, floorplanning, and timing closure.
3. Cross-Functional Collaboration
• Partner with CPU/GPU/AI accelerator, memory subsystem, and IP teams to define NoC interfaces and integration requirements.
• Collaborate with software teams on NoC modeling frameworks, traffic generators, drivers, and firmware for validation and optimization.
• Engage with product and system architects to align NoC capabilities with end-market requirements (AI/ML, datacenter, automotive, mobile).
4. Execution & Delivery
• Own NoC project planning, execution, and delivery, ensuring schedule adherence and quality.
• Establish and improve design methodologies, verification flows, and automation for rapid, reliable development.
• Support bring-up, debug, and performance validation in both pre-silicon and post-silicon environments.
资格
应征条件
• Master’s or Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. PhD is a plus.
• 15+ years in semiconductor design, with at least 5+ years leading NoC, interconnect, or complex subsystem development teams.
• Proven track record in NoC or interconnect architecture, RTL design, and integration in large-scale SoCs or multi-die systems.
• Strong understanding of coherency protocols, memory hierarchy, QoS mechanisms, and security within NoC.
• Hands-on experience with NoC performance modeling, verification, and traffic analysis.
• Familiarity with advanced packaging (2.5D/3D IC, chiplets, interposers) is highly desirable.
• HW/SW development experience (system simulators, firmware, drivers, or NoC modeling frameworks) is a strong plus.
• Excellent leadership, communication, and problem-solving skills.
• Customer and partner engagement experience preferred.英文
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其他语言
English
附加信息
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment工作时间
8am ~ 5pm
假日
Follow Malaysia PH
职业类别
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