13个职位: 招聘信息 研发(工程师(半导体))
R&D EngineerID:59248
3,500 MYR ~ 7,000 MYRMalacca工作内容
As an R&D Engineer, you will play a key role in developing and improving advanced ceramic and electronic components. You will work closely with cross-functional teams across R&D, Quality, and Manufacturing to drive innovation, enhance product performance, and support new product development in line with customer and market demands.• Conduct research and development for new products, materials, and processes aligned with the company's core technologies.• Design experiments, analyze data, and document findings to validate new materials or processes.• Collaborate with HQ and global R&D teams to transfer technology and localize product development.• Support product design, prototyping, and testing phases to ensure manufacturability and performance.• Optimize existing processes to improve product quality, reduce cost, and enhance efficiency.• Prepare technical reports, documentation, and presentations for internal reviews or customer discussions.• Evaluate and qualify alternative raw materials, vendors, and process improvements.• Participate in customer technical meetings and provide engineering support for new product introductions (NPI).• Ensure all development activities comply with ISO standards, safety, and environmental regulations.
福利制度
Salary: ~RM3.5K - RM7K
AL: Starting from 8 days
SL: 14 / 18 / 22 days
<Other benefits>
• Performance bonus - depends on company and individual performance
• Medical coverage
• Personal insuranceProcess Improvement/Yield Engineer ID:59251
3,500 MYR ~ 7,000 MYRMalacca工作内容
• Develop and implement manufacturing processes and procedures to optimize production efficiency, quality, and safety.• Collaborate with cross-functional teams, including design engineering, production, and quality assurance, to develop and implement new products or processes.• Drive continuous improvement initiatives and lean manufacturing principles to enhance productivity, reduce waste, and improve overall operational performance.• Monitor and analyze production data and metrics to identify areas for improvement and implement corrective actions as needed.• Ensure compliance with company policies, regulatory requirements, and industry standards to maintain a safe and environmentally friendly work environment.• Manage and oversee in engineering terms the implementation of new equipment, technologies, and automation systems to enhance manufacturing capabilities and efficiency.• Develop and manage the manufacturing line in terms of engineering, ensuring optimal allocation of resources and cost control.• Collaborate with suppliers and vendors to source and evaluate new technologies, materials, and equipment to improve manufacturing processes and reduce costs.• Provide technical support and guidance to resolve complex manufacturing issues, troubleshoot problems, and optimize production output.
福利制度
Salary: ~RM3.5K - RM7K
AL: Starting from 8 days
SL: 14 / 18 / 22 days
<Other benefits>
• Performance bonus - depends on company and individual performance
• Medical coverage
• Personal insuranceSenior System Board Design EngineerID:58749
10,000 MYR ~ 40,000 MYRBayan Lepas工作内容
• Lead the end-to-end development of complex multilayer system boards, including architecture definition, schematic design & technical decision-making.• Drive component selection, trade-off analysis & architecture optimization to meet electrical, thermal, and mechanical constraints.• Ensure high-speed signal integrity, power integrity & EMI/EMC compliance through simulation, design & testing.• Lead board bring-up, root cause analysis, and system-level debug using lab instruments (oscilloscopes, logic analyzers, spectrum analyzers, etc.).• Define test strategies and validate hardware against functional, environmental, and reliability requirements.• Prepare and review detailed design documentation: schematics, BOMs, layout constraints, test reports, and manufacturing files.• Collaborate with PCB layout engineers on components placements, routing and PCB stack up.• Skilful on handing rework tool to preforming board rework and modifications to hardware components.• Collaborate with cross-functional teams including SoC, firmware, packaging, mechanical, and manufacturing teams.• Interface with suppliers, PCB fabrication and assembly vendors for prototyping and production.• Provide technical leadership, mentoring, and code/design reviews for junior team members.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Staff IP Logic Design / MicroarchitectID:59122
15,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
The Senior IP Logic Design Engineer will be responsible for the design and implementation of logic design, microarchitecture definition, RTL coding, IP releases, high speed timing convergence, and collaboration with cross-functional teams to meet project specifications. Tasks also include performance optimization and ensuring design functionality through verification and validation processes.Key Responsibilities:1. IP Design Responsibility• Define and design Unit Level / Layer Level IP Design that able to converge timing at high end process node, with high frequency requirements.• Ability to drive a low power and complex design to completions.2. IP Quality Responsibility• Ability to orchestrate the team on validation requirements to catch all possible boundary conditions of logic bugs.3. IP Releases• Deep knowledge on Lint and CDC flow and ability to drive the Lint and CDC convergence.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementStaff Design Verification Engineer (DV) / Senior Staff Design Verification Engineer (DV)ID:59121
10,000 MYR ~ 30,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
This role will lead the DV team through all project phases—from planning to execution. The incumbent will have strong technical background while leading the team. The responsibilities cover verifying the functional correctness, performance, and robustness of the design. Key Responsibilities• Develop and execute comprehensive pre-silicon validation test plans • Create UVM/RTL-based testbenches • Perform simulation, code coverage analysis, and debug failures using tools such as VCS, Questa, or Xcelium.• Support assertion-based verification, formal verification, or hybrid methods where applicable.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementPrincipal Engineer/Principal Architect (Design Verification)ID:59120
20,000 MYR ~ 30,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
We are seeking an experienced and visionary Principal Engineer/Architect (Design Verification) to lead and drive next-generation design verification strategies, methodologies and execution. The ideal candidate will play a key technical role in shaping SkyeChip's DV architecture, methodologies, and execution frameworks to ensure world-class product quality and verification efficiency.Join us if you are a passionate and forward-thinking verification leader who thrives in a fast-paced, innovation-driven semiconductor environment and enjoys mentoring teams, solving complex verification challenges, and influencing design quality and other global engineering teams.Key Responsibilities1. DV Architecture and Methodology Leadership• Define and drive scalable, reusable, and high-efficiency DV architecture and methodology.• Establish verification best practices, including testbench architecture, constrained-random verification, coverage-driven methodologies, and formal verification integration.• Champion automation, regression management, and coverage closure frameworks for continuous efficiency improvement.2. Technical Strategy and Execution• Define verification strategies and verification plans for complex IP design verification (NOC, memory, etc.).• Evaluate and implement state-of-the-art tools, verification techniques, and verification accelerators.• Drive sign-off criteria definition, including functional and code coverage, assertions, and quality metrics.3. Cross-Functional Team Collaboration• Collaborate closely with architecture, design, software teams to ensure robust verification plans and alignment on design intent.• Provide technical guidance to local and global DV teams to standardize and scale best practices.4. Leadership and Mentoring• Mentor and develop technical talent within the DV team, promoting innovation and continuous learning.• Conduct technical reviews, training, and methodology adoption sessions.• Act as a key technical interface with stakeholders and management on DV efficiency and quality metrics.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementCircuit Design Manager / Senior ManagerID:59119
20,000 MYR ~ 35,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
• Lead and manage team that design and implement high speed interfaces and complex mixed-signal circuits using cutting-edge CMOS tech and EDA tools.• Manage deliveries between function groups for example Layout, RTL , DV , Physical Design and SIPI/Package.• Harmonize schedule and end to end delivery• Work closely with business development team to understand future projects and resource needed• First line of clarification and explanation for customer related questions and support• Work with post silicon team for design intent and required validations
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementPrinciple Digital Design EngineerID:59118
20,000 MYR ~ 25,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
This role will be responsible for architecting, designing, and verifying complex digital IPs and subsystems for SoCs or ASIC/FPGA-based products. As a senior role, it requires to work closely with system architects, verification, and physical design teams to deliver high-performance, power-efficient, and functionally correct RTL implementations. Overall, the responsibilities cover wider scope encompassing from IP to subsystem level and SOC level global issues.Key ResponsibilitiesArchitect with system engineers to perform:-• Define IP specifications, architecture & test concept.• Specify correct implementation of RTL design and verify digital circuits to deliver high performance, low power, and efficient implementation.• Conduct design reviews and support in documentation.• Support verification engineer to define verification test items.• Support in the roadmap formulation for the sensor IPs.• Support view generation engineers to verify the correctness of the Ips views.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementDirector of Advanced Package & Board TeamID:59117
25,000 MYR ~ 40,000 MYRBayan Lepas, Bayan Baru工作内容
The Director of Advanced Package & Board Team will lead the design, development, and implementation of advanced IC packaging and board-level solutions that enable high-performance, cost-effective, and reliable silicon products. This role requires strong technical leadership across multiple engineering domains — including substrate/interposer design, board design, SI/PI/thermal analysis, and manufacturing interface — while driving cross-functional collaboration with silicon design, system architecture, and OSAT/EMS partners.The successful candidate will define and execute the company’s packaging and board technology roadmap to support next-generation chiplet-based architectures, 2.5D/3D integration, and heterogeneous systems.Key Responsibilities1. Leadership & Strategy• Lead the Advanced Package & Board Design Team, including substrate, interposer, and PCB design engineers.• Define and execute packaging and board technology strategy aligned with company silicon product roadmap.• Establish design and verification methodologies for advanced packaging (e.g., 2.5D, fan-out, chiplet integration).• Drive innovation in thermal management, signal integrity, and power delivery optimization.2. Technical Execution• Oversee design and validation of interposers, substrates, and system boards from concept to production release.• Guide integration of chiplets, HBM, and passive components using state-of-the-art packaging technologies.• Ensure robust SI/PI, mechanical, and thermal analysis for design sign-off.• Collaborate with silicon design teams on bump assignment, die floorplanning, and package co-design.• Manage board-level design for system bring-up, test platforms, and reference designs.3. Supplier & Ecosystem Management• Engage and qualify OSATs, substrate vendors, and PCB manufacturers to ensure quality and yield.• Partner with EDA vendors to establish design automation flow and DRC verification.• Drive technology transfer and pilot runs with manufacturing partners.4. Project & People Management• Plan resources, schedules, and budgets to ensure timely delivery of packaging and board design projects.• Build and mentor a high-performing team with expertise across electrical, mechanical, and materials engineering.• Foster collaboration across silicon, test, reliability, and operations teams.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementIP Logic Design Principle EngineerID:58602
20,000 MYR ~ 35,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
The IP Logic Design Principle Engineer will be responsible for architecting microarchitecture design implementation of an IP, spanning across all IP stack such as application layer, transaction layer, link layer, die to die layer, physical layer. Ability to code verilog / system verilog RTL for complex IP, review RTL coding, orchestra IP development phase for projects from beginning to completion. This includes the ability to technically drive the IP team on Design / Validation in completing technical tasks up to IP releases for customers. Candidate must be also capable of solving high speed timing convergence on various processes and collaborate with cross-functional teams to meet project specifications. The role will drive performance optimization and ensuring design functionality through verification and validation processes.Key Responsibilities:1. IP Microarchitecture Definitions• Define microarchitecture definition across layers and define a clean inter unit partition requirements.• Drive design team to deliver best-in-class IP design that optimizes for area, latency, power and performance.• Ability to distribute and drive the design team to implement high quality design and meeting time to market requirements.2. IP Design Responsibility• Implement very complicated high-speed design which can converge timing convergence at high frequency.• Capable of orchestrating the team on right directions of timing convergence, CDC, lintra and etc. for tools closure.3. IP Quality Responsibility• Review IP design and validation testplan to make sure IP Design is at top notch quality.4. IP Releases• Deep knowledge on Lint and CDC flow and ability to drive the Lint and CDC convergence.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment
