概述
薪资
10,000 MYR ~ 18,000 MYR
工作行业
Software/Information Processing, IT/Telecommunications, Manufacturing(Computer/Telecommunication), Manufacturing(Electronics/Semiconductors)
工作内容
We are seeking a highly skilled and motivated Senior or Lead Emulation and Prototyping Engineer to define and lead emulation strategies for IP, complex SoC and system-level projects. This role requires a strong technical leader who can work independently, while also collaborating closely with system architects and pre-silicon verification teams to drive successful pre-silicon validation, firmware development, and early software enablement using industry-leading emulation/prototyping platforms.
Key Responsibilities:
• Define and lead the emulation and prototyping strategy for IP & SoC programs to support architectural validation, functional verification, and software bring-up.
• Work closely with chip architects to understand IP & system-level design goals and translate them into emulation requirements and constraints.
• Collaborate with pre-silicon design verification engineers to integrate emulation/prototyping into the broader verification strategy and identify high-value use cases.
• Partition and map RTL designs to commercial emulation/prototyping platforms (e.g., Cadence Palladium, Synopsys ZeBu, Mentor Veloce).
• Develop emulation models, transactors, and hybrid environments (e.g., simulation + emulation or virtual platforms).
• Lead bring-up and debug activities of the emulation/prototyping environment, ensuring performance, accuracy, and reusability.
• Drive the development of automated test environments, infrastructure, and scripts to enable fast deployment and repeatability.
• Support firmware and software teams with stable and functional pre-silicon platforms for development and debug.
• Maintain comprehensive documentation including emulation and prototyping setup guides, debug workflows, and system usage instructions.
• Mentor junior engineers and evangelize emulation best practices across engineering teams.
资格
任职资格
• Bachelor’s or Master’s degree in Electrical & Electronics Engineering, Computer Engineering, or related field.
• 7+ years of hands-on experience in IP or SoC emulation/FPGA prototyping, system validation, or hardware acceleration.
• Deep expertise with emulation/prototyping platforms such as Cadence Palladium, Synopsys ZeBu, or Mentor Veloce.
• Solid understanding of RTL design, simulation, and verification flows (SystemVerilog, Verilog, UVM).
• Experience in building transactors and integrating IP blocks into emulated systems.
• Strong scripting skills (Python, Perl, TCL, shell) for automation and flow development.
• Proven ability to work cross-functionally with architects, RTL designers, and verification engineers.
• Excellent debugging and analytical skills, including hardware-software interaction debugging.英文
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其他语言
English
附加信息
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment工作时间
8am ~ 5pm
假日
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