概述

• 薪资

  10,000 MYR ~ 22,000 MYR

• 工作行业

  Software/Information Processing, IT/Telecommunications, Manufacturing(Computer/Telecommunication), Manufacturing(Electronics/Semiconductors)

• 工作内容

  We are seeking a Memory Circuit Design Engineer to design and verify high-performance, low-power SRAM and/or multi-port Register Files (RF) macros for integration into Memory Compiler software. You will own transistor-level design and simulations from specification through silicon correlation.
  
  Key Responsibilities
  • Design SRAM and/or multi-port Register Files (RF) circuits at transistor level (bitcell and periphery).
  • Define memory architecture/topology to meet power, performance, area, yield and Vmin targets.
  • Run schematic capture & SPICE simulations across PVT corners & Monte Carlo to close read/write margins.
  • Analyze & optimize critical paths (decoders, wordline drivers, sense amps, write drivers, IO) for speed & robustness.
  • Create concise margin/performance reports & track design closure metrics.
  • Drive post-layout verification with extraction & sign-off simulations; partner with layout for pitch- matched arrays.
  • Work with Design Automation/Software Team/EDA vendor
  • To integrate Memory circuits into Memory Compiler system
  • To automate/generate collateral views & timing/power models (Liberty/LEF/Verilog or equivalent)
  • Support silicon bring-up, characterization and simulation-to-silicon correlation.