68 Jobs: IT/Telecommunications
Pre-Sales Manager (Security)ID:60712
12,000 MYR ~ 18,000 MYRKota Damansara/Petaling JayaJob Description
Role SummaryThe Presales professional will act as a technical bridge between sales, resellers / customers and delivery teams, ensuring proposed solutions align with client needs.1. Product Expertise & Certification- Acquire in-depth knowledge of the assigned product portfolio.- Obtain and maintain vendor certifications to validate expertise.- Stay updated on product roadmaps, new features, and industry trends to position solutions effectively.2. Solution Design & Proposal Development- Perform requirement analysis of customer environments and business needs.- Prepare technical proposals, high-level designs (HLD) and Bills of Materials (BOM).- Customize RFP/RFI responses, tender submissions and ensure compliance with technical specifications.- Align solutions with customer budgets, timelines and technical constraints.3. Principal Collaboration- Develop and maintain close relationships with principal/vendor Sales Engineers to ensure:- Accurate product messaging and positioning.- Proposed solutions meet customer requirements and vendor best practices.4. Client Engagement & Presentations- Conduct product demonstrations, workshops, and tailored presentations for clients.- Act as a trusted advisor by translating technical features into business benefits.- Address technical objections and clarify solution feasibility, scalability and ROI.5. Proof of Concept (PoC) & Technical Validation- Define scope, success criteria, and test plans aligned with customer expectations.- Brief technical teams on requirements and oversee PoC implementation.- Ensure PoC results align with proposed solutions and address customer pain points.6. Training & Enablement- Conduct training sessions for resellers, partners and internal teams on product offerings.7. Market & Competitive Intelligence- Analyze competitor solutions and differentiate offerings with data-driven insights.
Benefit
AL
< 2 years : 16 days
2y to 5y : 18 days
>5 years : 21 days
ML
< 2 years : 14 days
2y to 5y : 18 days
>5 years : 22 days
Benefits:
- Office Parking Subsidy
- Contractual Bonus: 1 month
- Optical & Dental Claims
- Health Screening
- Medical Claims
- Hospitalization - medical card
- Hospitalization: Cover employee, spouse & child.
- Outpatient clinic: Cover employee, spouse & child.
- Group Term Life InsuranceNetwork Security EngineerID:60711
4,000 MYR ~ 6,000 MYRKota Damansara/Petaling JayaJob Description
- Planning, design, assessing and mitigating risks, consistent configuration and deployment of network security solutions, with ownership of the delivery process for the entire product/service lifecycle.- Responsible for driving sales by assisting sales team to act as a technical resource throughout the sales cycle.- To provide technical assistance during the sales process for demo or proof of concepts to meet customer business requirements.- Provide excellent customer service to internal and external clients, including response to escalations, proactively follow up with customers of network security issues, assessing and communicating business impact.- Work closely with the technical helpdesk team to answer, escalate and resolve customer’s technical issues.- To lead and guide other team members on network deployment, troubleshooting and security best practices.- Provide fast isolation and resolution of Firewall, WAF, network routing, switching, security, wireless, VPN issues.- Provide good judgment in solving problems as well as identifying problems in advance, and proposing solutions.- Create and maintain up to date documentation of the network security solutions, detailing configuration of deployed solutions.- Actively involved, organized, reliable and accountable.- Ability and desire to learn and grow independently as well as in a team.- Multitasking ability to manage time well and meet multiple deadlines in a hectic environment.
Benefit
AL
< 2 years : 16 days
2y to 5y : 18 days
>5 years : 21 days
ML
< 2 years : 14 days
2y to 5y : 18 days
>5 years : 22 days
Benefits:
- Petrol Allowance
- Handphone Allowance
- Onsite Allowance
- Office Parking Subsidy
- Contractual Bonus: 1 month
- Optical & Dental Claims
- Health Screening
- Medical Claims
- Hospitalization - medical card
- Hospitalization: Cover employee, spouse & child.
- Outpatient clinic: Cover employee, spouse & child.
- Group Term Life InsuranceProduct Manager (Network Solution / Security Solution)ID:60455
10,000 MYR ~ 12,000 MYRKota Damansara/Petaling JayaJob Description
The Product Manager will own the full product lifecycle for assigned solution portfolio distributed through our channel network. From defining market strategy, driving vendor relationships, developing go-to-market plans, to monitoring performance and profitability.Responsibilities:- Ensure the assigned target is met and maintain profitability of the product to contribute to the company’s overall business.- Liaise with principal on commercial arrangement. Conduct periodical funnel review and quarterly business review with principal. Work closely with principal to have joint customer visits and follow-up on projects.- Develop business plan for the assigned product. Formulating Go-to-market strategies which include partner recruitment and enablement plan, marketing plan and resources plan.- Support and work closely with channel sales team to recruit partner and build focus partners to be consistent contributors.- Develop direct contact with the end-user accounts to identify potential opportunities as well as enhance market awareness on product among targeted accounts.- To be equipped with product and technology knowledge as well as understanding competitor products.- Provide product training to internal team and partners.
Benefit
AL
< 2 years : 16 days
2y to 5y : 18 days
>5 years : 21 days
ML
< 2 years : 14 days
2y to 5y : 18 days
>5 years : 22 days
Benefits:
- Office Parking Subsidy
- Contractual Bonus: 1 month
- Optical, dental: RM500 per year
- Health Screening: RM200 per year
- Medical Claims RM 1750 / year for outpatient clinic
- Hospitalization - medical card
- Hospitalization: Cover employee, spouse & child.
- Outpatient clinic: Cover employee, spouse & child.
- Group Term Life InsuranceSenior Software Engineer (C/C++) - PGID:60301
12,000 MYR ~ 15,000 MYRGeorgetownJob Description
- Design, develop, and optimize high-performance trading systems in C++/ C.- Collaborate with traders and engineers to implement new strategies and features.- Work on low-latency networking, real-time data processing, and system reliability.- Contribute to architectural decisions and performance tuning.
Benefit
- AL: starting from 15 days
- MC: starting from 14 days
- EPF, SOCSO, EIS
- Performance bonus
- Paid vacation and daily lunch provided
- Medical, vision and dental coverage
- Health Insurance
- Car park subsidySenior Software Engineer (C/C++) - KLID:60300
12,000 MYR ~ 15,000 MYRDamansara HeightsJob Description
- Design, develop, and optimize high-performance trading systems in C++/ C.- Collaborate with traders and engineers to implement new strategies and features.- Work on low-latency networking, real-time data processing, and system reliability.- Contribute to architectural decisions and performance tuning.
Benefit
- AL: starting from 15 days
- MC: starting from 14 days
- EPF, SOCSO
- Performance bonus
- Paid vacation and daily lunch provided
- Medical, vision and dental coverage
- Health Insurance
- Car park subsidyDFT Logic Design Engineer (Senior/Staff)ID:60263
8,000 MYR ~ 20,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
Job SummaryWe are seeking an experienced Senior/Staff DFT Logic Design Engineer to support the company's ASIC, SoC, and IP development initiatives in the area of Design for Testability (DFT). The engineer will be responsible for defining DFT architecture, implementing and verifying DFT features, integrating scan and BIST structures at the RTL level, and driving fault coverage from design through silicon bring-up. The role involves close collaboration with RTL, Verification, Physical Design, and Test Engineering teams to deliver high-quality DFT implementation for digital IP and ASIC products.Key Responsibilities1. DFT Architecture & Planning• Define and own the DFT architecture for digital IP and ASIC projects, including scan insertion strategy, compression ratios, JTAG/IEEE 1149.1 boundary scan, MBIST/LBIST planning, and DFT microarchitecture.• Document and maintain DFT specifications throughout the design cycle.• Lead the planning and execution of various DFT feature implementation and verification.2. DFT RTL Design & Integration• Develop and integrate DFT RTL (SystemVerilog/Verilog), including scan wrappers, scan controllers, BIST controllers, test access ports (TAP), and clock/reset control logic.• Implement Memory BIST logic insertion, integration, and verification for IP and ASIC projects.• Ensure DFT structures are synthesis-clean, timing-closed, and do not impact functional performance or power.3. Scan, ATPG & Verification• Implement scan architecture including scan chain stitching, scan controller generation, test compression, and scan timing closure.• Run ATPG to generate and validate stuck-at, transition, path-delay, and cell-aware fault pattern sets.• Perform gate-level simulation (GLS) to verify scan design.• Generate DFT collateral including MBIST patterns, ATPG patterns, scan constraints, timing constraints, BSDL files, and related documentation.• Achieve and sign off target fault coverage metrics.4. Design Quality & Validation• Collaborate with RTL designers to establish DFT-aware coding guidelines.• Perform DFT rule checking, CDC analysis, Lint, and static quality checks to identify and resolve testability violations early in the design cycle.• Support netlist validation through LEC and STA during implementation and timing closure.• Resolve DFT-related ECOs prior to tape-out.5. JTAG & Boundary Scan• Design and verify TAP controllers.• Implement and verify JTAG/Boundary Scan architecture at IP and SoC level.• Generate BSDL files and support Boundary Scan verification.6. Post-Silicon & Manufacturing Support• Support post-silicon validation, silicon power-on, ATE bring-up, and high-volume manufacturing testing.• Work with test engineers to debug ATPG patterns, analyze yield data, and identify root causes related to RTL or physical design issues.• Support test pattern bring-up and production test activities.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementPhysical Design Lead EngineerID:60207
10,000 MYR ~ 20,000 MYRBayan Lepas, Bayan BaruJob Description
We are seeking a Physical Design Lead to own and drive the end-to-end physical implementation of testchips and high-speed interface subsystems such as DDR/LPDDR PHY, HBM PHY, and UCIe from netlist through tape-out-ready GDSII on leading-edge process nodes. This is a technical lead role: candidate is expected to take full ownership of implementation scope, mentor junior PD engineers, define methodology, and drive cross-functional coordination with RTL design, DFT, analog/custom layout, and verification teams. Seniority level to be determined by experience.Key Responsibilities• Own end-to-end physical implementation of assigned testchip or high-speed interface subsystem (DDR/LPDDR, HBM, UCIe, or equivalent): floorplanning, power grid design, placement, clock tree synthesis (CTS), routing, and chip finishing through to GDSII stream-out.• Coordinate timing closure across all functional modes and PVT corners with the dedicated full-chip STA owner; provide timing-aware physical implementation decisions, flag routing and placement contributors to timing degradation, and execute physical ECOs as directed.• Lead chip-level or subsystem-level floorplan definition: partition boundaries, I/O ring assembly, hard IP (PHY, memory, custom analog) placement, power domain planning, and bump/pad assignment; balance area, routability, and signal-integrity constraints.• Define and enforce the physical design methodology and flow for the team: synthesis-to-P&R handoff conventions, ECO management, signoff checklists, and documentation standards; develop and maintain flow automation scripts for regression, reporting, and incremental ECO runs.• Drive power integrity sign-off: static and dynamic IR-drop analysis (Redhawk/Voltus or equivalent), EM rule compliance, power strapping strategy, and decap insertion; collaborate with circuit and layout teams to resolve violations.• Coordinate physical verification closure (DRC/LVS/ERC/Antenna) using Calibre or equivalent, including custom analog and mixed-signal IP integration; manage foundry rule deck updates and waiver documentation.• Interface with RTL designers, DFT engineers, and analog/custom layout engineers to align on design constraints, resolve integration issues, and ensure clean handoff at each project milestone; represent physical design in architecture and tapeout readiness reviews.• Mentor and technically guide junior and mid-level physical design engineers; review their floorplans and closure strategies; provide actionable feedback and escalate risks proactively to the program lead.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSales and Marketing ExecutiveID:60186
7,000 MYR ~ 10,000 MYRBangsarJob Description
- Direct Sales Activities(e-mail/phone calls/business meetings with customers who inquire about the company's services)- Sales promotion support for partners(accompanying business meetings, study sessions, seminars, etc.)- Marketing Support(market research, support for exhibition participation, translation of materials, etc.)- Bridge with Japan headquarters (back office support)-Eventually, support for partners in Singapore and the Philippines- NO sale target and KPI target
Benefit
・Bonus (2months)
・Commuting ＆ Work from Home Allowance 300RM/month
・Business trip allowance
・Global Employee Share Ownership Plan
・14 days of paid leave
*16 days from the 6th year
・14 days of Sick leave
・Private Health Insurance Maximum 1,000RM/year
・Pension
・Workers' compensation
・PC and smartphone provided
・Communication Booster BenefitSenior UI DesignerID:60099
6,000 MYR ~ 10,000 MYRBangsarJob Description
We are seeking a highly skilled and experienced UI/UX Designer to lead the design of intuitive, engaging, and aesthetically appealing digital experiences across web, mobile, and emerging platforms. As a member of the design team, you will collaborate closely with product managers, engineers, and stakeholders to shape the user journey and define the visual language of our products.Key Responsibilities- Lead end-to-end design process: research, ideation, wireframing, prototyping, UI design, and usability testing.- Translate complex business requirements into intuitive and elegant user-centered solutions.- Create and maintain design systems, UI libraries, and style guides.- Champion UX best practices and advocate for user needs in product planning.- Conduct user research and usability studies to iterate and validate designs.- Collaborate with cross-functional teams to ensure high-quality implementation of designs.
Benefit
Annual Leave:
1-2 years = 12 days
3-4 years = 16 days
5 years and above = 18 days
Bonus:
13th month salary
Allowances:
Transport, Meal, Birthday Allowance
Medical/Dental/Optical claim
Others:
- Sports Activities (Badminton & Basketball)
- Company Outing
- Training and certification sponsored by company (Selected employees).
- Rewards and recognition: Long Service Award / Best Performer Award / Role Model Awards etc
- Project Incentive (upon Company Declaration based on project performance)Memory Layout LeadID:60085
10,000 MYR ~ 12,000 MYRBayan Lepas, Bayan BaruJob Description
We are seeking a Memory Layout Lead to independently execute physical layout design and completion of SRAM and/or Register File (RF) memory macros. You will own full-custom layout from floorplanning through DRC/LVS sign-off, working closely with circuit designers to deliver pitchmatched, tape-out-ready memory blocks. Seniority level to be determined by experience.Key Responsibilities• Execute full-custom physical layout of SRAM and/or multi-port Register File (RF) macros, including bit cell arrays, periphery circuits (decoders, wordline drivers, sense amplifiers, write drivers), and I/O rings, to tape-out quality with limited guidance.• Interpret circuit schematics and layout specifications to implement pitch-matched arrays and hierarchical peripheral blocks, ensuring correct device sizing, poly/diffusion pitches, and metal routing within process constraints.• Drive DRC, LVS, and ERC verification to closure independently; track and resolve violations systematically and maintain sign-off records for assigned memory blocks.• Perform parasitic extraction (PEX) and work directly with circuit designers on post-layout simulation correlation; flag and resolve layout-induced timing or performance degradations.• Implement design-for-manufacturability (DFM) best practices: critical layer fill, dummy device insertion, metal density compliance, and multi-patterning coloring at advanced nodes.• Produce accurate layout deliverables including GDS stream-out, LEF abstracts, and associated documentation; maintain revision history and design review records.• Interface with circuit designers and physical verification engineers to resolve layout-toschematic mismatches and drive end-to-end closure on all assigned memory macros.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment