187 Jobs: Manager
Business Development ManagerID:59723
6,000 MYR ~ 10,000 MYRKota Damansara/Petaling JayaJob Description
Role overviewResponsible for driving revenue growth by identifying new business opportunities, building strong client relationships and promoting cybersecurity solutions.Key Responsibilities1. New Business Development:- Identify and pursue new business opportunities in target markets.- Develop and execute strategies to expand the customer base.2. Client Relationship Management:- Build and maintain strong relationships with key decision-makers / project owner.- Understand client needs and submit propose cybersecurity solutions.3. Sales & Revenue Growth:- Achieve sales targets and KPIs.- Be a team member to delivers presentations and proposals.4. Collaboration:- Work closely with technical teams to ensure solution alignment with client requirements.- Coordinate with marketing for lead generation campaigns and events.
Benefit
AL
< 2 years : 16 days
2y to 5y : 18 days
>5 years : 21 days
ML
< 2 years : 14 days
2y to 5y : 18 days
>5 years : 22 days
Benefits:
- Office Parking Subsidy
- Contractual Bonus: 1 month
- Optical, dental: RM500 per year
- Health Screening: RM200 per year
- Medical Claims RM 1750 / year for outpatient clinic
- Hospitalization - medical card
- Hospitalization: Cover employee, spouse & child.
- Outpatient clinic: Cover employee, spouse & child.
- Group Term Life InsuranceSenior Staff Advanced Package & Board TeamID:59718
15,000 MYR ~ 30,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
The Senior Staff Advanced Package & Board Team will lead the design, development, and implementation of advanced IC packaging and board-level solutions that enable high-performance, cost-effective, and reliable silicon products. This role requires strong technical leadership across multiple engineering domains — including substrate/interposer design, board design, SI/PI/thermal analysis, and manufacturing interface — while driving cross-functional collaboration with silicon design, system architecture, and OSAT/EMS partners.The successful candidate will define and execute the company’s packaging and board technology roadmap to support next-generation chiplet-based architectures, 2.5D/3D integration, and heterogeneous systems.Key Responsibilities1. Leadership & Strategy• Lead the Advanced Package & Board Design Team, including substrate, interposer, and PCB design engineers.• Define and execute packaging and board technology strategy aligned with company silicon product roadmap.• Establish design and verification methodologies for advanced packaging (e.g., 2.5D, fan-out, chiplet integration).• Drive innovation in thermal management, signal integrity, and power delivery optimization.2. Technical Execution• Oversee design and validation of interposers, substrates, and system boards from concept to production release.• Guide integration of chiplets, HBM, and passive components using state-of-the-art packaging technologies.• Ensure robust SI/PI, mechanical, and thermal analysis for design sign-off.• Collaborate with silicon design teams on bump assignment, die floorplanning, and package co-design.• Manage board-level design for system bring-up, test platforms, and reference designs.3. Supplier & Ecosystem Management• Engage and qualify OSATs, substrate vendors, and PCB manufacturers to ensure quality and yield.• Partner with EDA vendors to establish design automation flow and DRC verification.• Drive technology transfer and pilot runs with manufacturing partners.4. Project & People Management• Plan resources, schedules, and budgets to ensure timely delivery of packaging and board design projects.• Build and mentor a high-performing team with expertise across electrical, mechanical, and materials engineering.• Foster collaboration across silicon, test, reliability, and operations teams.
Benefit
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSales ManagerID:59710
8,000 MYR ~ 12,000 MYRKota Damansara/Petaling JayaJob Description
• Responsible for growing the company's revenue by ensuring that key clients are satisfied with the services provided, identifying new business opportunities for key clients, and attending all meetings, and conventions• Responsible for overall Customer satisfaction, the processing orders for company products and services• Establish relationship with clients and provide high standard of customer service continually.• Play fundamental role in setting up new businesses; take responsibility for the effective on-boarding of new customers.• Identify and develop sales into the Direct & Distribution channels.• Responsible to develop/expand business networks/clientele base and drive sales performance;• Manage key customer relationships as well as plan and implement competitive strategies to achieve substantial growth in sales and market shares, including preparing sales proposals and quotations• Actively identify and develop new and emerging business opportunities in the market and strategically tap them to promote a new product line;• Compile market intelligence such as competitors’ pricing, new product launch and competing activities as well as information on new players;• Plan and participate in sales promotional activities such as trade fairs/exhibitions to maximize brand exposure;• Identify suitable local distributors and manage their monthly activities in marketing, projects sales, pricing and technical support.
Benefit
Salary range: ~RM8K - RM12K
Breakdown
-Company Bonus
-Company Phone
-Mileage ClaimGrowth Marketing LeadID:59700
15,000 MYR ~ 22,000 MYRMont KiaraJob Description
This position reports directly to the CEO and is responsible for designing and driving scalable acquisition and retention models that directly contribute to business growth.Working closely with the sales function and local clinic operations, the role will optimize the end-to-end patient journey—from acquisition to continued engagement—as a structured and repeatable system.Beyond strategy development, this role is expected to be hands-on where needed,leading execution and continuous improvement while building a scalable growth model.The role also leads the design and operation of continuous improvement cycles basedon data analysis and deep understanding of patient behavior.【Key Responsibilities】1) Design of Acquisition & Retention Structure• Design end-to-end acquisition and retention strategies (channels, funnel,customer journey)• Develop scalable structures to maximize LTV• Bridge B2B (sales) and B2C (patient experience) into an integrated model2) Execution & Optimization• Drive initiatives in collaboration with internal teams and external vendors• Lead hypothesis-driven cycles: planning → execution → validation → improvement• Propose improvements based on both quantitative and qualitative insights3) KPI Design & Performance Management• Define KPIs across acquisition, conversion, retention, and LTV• Monitor performance and drive continuous improvement based on data• Promote data-driven decision-making4) Strategy & Prioritization• Develop marketing strategies aligned with business goals• Define priorities and roadmap for initiatives• Translate business strategy into actionable plans5) Cross-functional Collaboration & Vendor Management• Design collaboration across internal stakeholders, including sales and clinicoperations• Manage and align external vendors (Japan and local markets)• Ensure consistency between strategy and execution across all touchpoints
Benefit
- EPF, SOCSO, EIS Provided
- Transportation Allowance
- AL : 10 days
- MC : 14 days
- Bonus: provided according to company achievement/once per yearSr Standard Cell Design EngineerID:59656
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a Library Design Engineer to own the end-to-end development of a production-grade standard cell library on leading-edge process nodes. You will drive transistor-level design, multi-Vt cell topology, full characterization, and PPA validation delivering robust, sign-off-ready library views to downstream implementation flows. Seniority level to be determined by experience.Key Responsibilities• Design, simulate, and analyze standard cell circuits at transistor level, including combinational, sequential, clock, and physical utility cells across multiple Vt flavors (HVT/SVT/LVT/ULVT) and drive strengths.• Perform layout process-node-shift; guide layout clean-up effort and review for DRC/LVS compliance, EM/IR rules, and parasitic awareness at the cell level.• Define & execute characterization flow to generate complete library views & models, covering timing (NLDM/CCS/ECSM), power (dynamic, leakage, internal), noise, and variation-aware models (LVF/SOCV/POCV); ensure Liberty, LEF, and GDS consistency.• Define & execute QA regression to check library quality; validate cell robustness including noise margin, drive strength, X-propagation, and scan/DFT cell correctness; drive STA correlation using PrimeTime or Tempus to confirm model accuracy in real PD flows.• Lead standard cell library IP integration into Testchip, including Testchip circuit and test plan development; support hardware bring-up and debug.• Perform pre/post-silicon correlation & model/design optimization; drive root-cause analysis for first-silicon issues and implement yield/robustness improvements.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSr Analog Circuit Design Engineer (Clocking)ID:59653
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. The candidate should have specialized expertise in Clocking as described below. Seniority level to be determined by experience.Key Responsibilities• Design and debug PLL/DLL architectures and circuits (integer/fractional-N; analog or digital-assisted).• Oscillators: LC or ring-oscillator (RO) VCO/DCO, frequency synthesis, phase noise/jitter analysis and budgeting.• Delay lines, measurement/ruler circuitry, phase interpolators, and calibration/trim techniques.• DCC/DCM/DCA, clock tree/distribution, and clock management units; low-jitter clock generation and distribution networks.• Own end-to-end block/IP delivery: architecture studies, specification, transistor-level design, simulation, post-layout sign-off, and silicon bring-up/characterization.• Behavioral modeling (e.g., Verilog-A/SystemVerilog) to explore loop dynamics, spur/jitter mitigation and system interactions.• Build verification test benches; validate performance across PVT corners, mismatch/Monte Carlo (as applicable), and post-extraction parasitics.• Work closely with layout/mask designers: floorplanning guidance, layout reviews, and ensuring LVS/DRC clean implementation and parasitic awareness.• Meet quality and reliability requirements (e.g., EM/IR, aging/overstress); contribute to robust design methodology and sign-off checklists.• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSr Analog Circuit Design Engineer (High-Speed I/O)ID:59652
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. The candidate should have specialized expertise in High-Speed I/O as described below. Seniority level to be determined by experience.Key Responsibilities• Design TX/RX, analog front-end, serializers/deserializers, high-speed level shifters, predrivers/drivers, and termination/impedance calibration blocks.• Equalization: Feed-Forward Equalization (FFE), DFE, CTLE and related adaptation/control loops.• Clocking support for links (e.g., CDR interactions, low-jitter clock generation/distribution as needed by PHY).• SI analysis and creation/validation of IBIS/IBIS-AMI models; channel characterization (insertion loss, return loss, crosstalk) and eye diagram margin assessment.• Own end-to-end block/IP delivery: architecture studies, specification, transistor-level design, simulation, post-layout sign-off, and silicon bring-up/characterization.• Build verification test benches; validate performance across PVT corners, mismatch/Monte Carlo (as applicable), and post-extraction parasitics.• Work closely with layout/mask designers: floorplanning guidance, layout reviews, and ensuring LVS/DRC clean implementation and parasitic awareness.• Support interface integration and sign-off: PPA optimization, reliability checks (e.g., EM/IR, aging/overstress), and timing closure collaboration.• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSr Analog Circuit Design Engineer (Pure Analog)ID:59651
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. Seniority level to be determined by experience.Key Responsibilities• Reference generation: bandgap, bias circuits, reference voltages/currents; high-accuracy, low-noise design techniques.• Low offset / low-noise voltage regulators (LDO) and stability/compensation networks; PSRR and transient response optimization.• Voltage and power monitoring circuits: droop detection, voltage detectors, PowerGood and POR generation, analog sensing, and housekeeping blocks.• Power-management components, linear and/or switching-adjacent blocks, charge pumps, as applicable to the SoC/PHY environment.• Design/support ADC/DAC blocks and associated analog support circuits (sampling, references, amplifiers/comparators, clocking).• Voltage and temperature sensor design and characterization. Bandgap and PTAT-based temperature sensing; process corner detection circuits. Sensor readout, digitization, and calibration techniques.• Own end-to-end block/IP delivery: architecture studies, specification, transistor-level design, simulation, post-layout sign-off, and silicon bring-up/characterization.• Build verification test benches; validate performance across PVT corners, mismatch/Monte Carlo (as applicable), and post-extraction parasitics.• Work closely with layout/mask designers: floorplanning guidance, layout reviews, and ensuring LVS/DRC clean implementation and parasitic awareness.• Meet quality and reliability requirements (e.g., EM/IR, aging/overstress); contribute to robust design methodology and sign-off checklists.• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment【Penang】 Senior Sales ExecutiveID:59632
4,600 MYR ~ 6,000 MYRGelugur, JelutongJob Description
【Job Responsibilities】• Product handle is Electronic component product• To handle and serve Global Distributors business for E&E (Global Distributors : Avnet, TTI, Future, Arrow ) • Manage and grow existing key accounts through strong relationships and continuous engagement.• Work closely with technical teams to deliver product demonstrations, troubleshooting, and technical presentations.• Collaborate with supply chain and operations teams to manage lead times, product availability, and customer delivery schedules.• Prepare sales forecasts, pipeline updates, and monthly business reports.• Provide timely solutions to customer requirements and coordinate after sales support.
Benefit
Salary range: ~RM4.6K - RM6K
- Annual Leave
- Medical Leave
- Transport Allowance
- Transport to Client Visit (Claimable)
- Company Parking
- Bonus (Depends company performance - avg 2 months)
- Other benefits will be disclose during interview session.
- No sales commissionProject ManagerID:59617
8,000 MYR ~ 13,000 MYRSeri PetalingJob Description
• Manage the planning, organizing and implementation of complex strategic project/initiatives• Monitor of Project Implementation Plan of overall works• Review progress against plans, reporting progress and result to the Management• Lead and coordinate project team to eliminate the obstacle as well as mentoring the team to improve project approach, process and implementation• Develop and monitoring project plan and track project milestones with appropriate process to ensure the project runs according to schedule and budget• Planning work program of project and monitoring stage completion• Monitoring inspections and test are carried out in accordance to the contract specification• Coordinate, review and submission of progress payment to the customer and facilitate timely certification of sub-contractor claims• To liaise with Client• Co-ordinate interfacing activities works of various sub-contractors• Perform other duties as assigned from time to time
Benefit
1) Annual Leave
(<2 years @ 14 days)
(2-5 years @ 17 days)
(>5 years @ 20 days)
2) Medical Leave
(<2 years @ 14 days)
(2-5 years @ 18 days)
(>5 years @ 22 days)
3) Medical Claims (RM800/year) at panel clinic
4) Dental claim (RM300/year)
5) Insurance (after confirmation)
6) Mobile Phone claim (up to RM120)
7) Mileage, parking & toll claim – for site visit/meeting client
