176个职位: Manager
Assistant Area Sales Manager (FMCG)ID:59289
7,200 MYR ~ 9,200 MYRDamansara Heights工作内容
Job Purpose: Assist the General Trade Group Manager in over-seeing the sales, operation & market situation in the Central region of Malaysia.1] Managing the overall sales performance for General Trade within assigned areas, ensuring profitability and growth. 2] Overseeing Modern Trade operations with effective deployment of promotion activities. 3] Developing an overall business plan, including sales strategies, and managing profit goals.4] Ensuring team projects and enhances Kobayashi brand by improving the professionalism and services provided and building brand awareness in his/her respective market to achieve growth.5] Performing territory and sales analyses, assessing the results, and adjusting sales strategies accordingly.6] Implementing a sales management process includes source and share market research to assist the sales team in identifying and prioritizing key customers and prospects.7] Monitoring the performance KPI of the sales team and motivating members to meet or exceed sales targets.8] Managing, training, and providing overall guidance to the sales team of an assigned territory / channel.9] Lead distributor sales teams to increase numeric and weighted distribution10] Track market trends and competitor activity11] Studying current market trends on products, gathering feedback from customers and market to enhance the products' quality and branding image, and sharing the findings with the internal teams and top management.12] Constantly reviewing, providing feedback, analysing sales data and sales related reports to his/her superior and top management.13] Undertaking all other duties and responsibilities as so instructed by the superior and/or company.
福利制度
• Transport Allowance
• Parking: Claim by receipts.
• Company Phone
• Travel expenses (To Outstation/ Oversea) for toll, parking, hotel accommodation and flight: Claim by receipts.
• Travel expense (To outstation) Petrol: Claim by mileage - RM 0.55/ km
• Medical and Hospitalization: Insurance coverage (Up to RM 60K per annum)
• Annual Leave: 1st to 2nd Year - 12 days, 3rd year – 14 days, 4th year – 16 days, 5th year – 18 days and from 6th year and onwards – 20 days.
• Yearly performance bonus (Average 2-3 months)Strategy ManagerID:59478
10,000 MYR ~ 15,000 MYRDamansara Heights工作内容
SummaryThe role will involve analyzing and providing solutions to businesses problems, as well involvement in overseeing development of the proposed solutions and finally completion of the projects. There will also be participation in executing plans to managing change impacts to our customers’ organization.Key Responsibilities:Business1.Market Research - gathering market information to be used for data analysis and provide analysis & conclusion for market research2.Gather business information to be used for business process improvement analysis and provide assessment, recommendation and conclusion on the analysis.3.Recommend solutions based on analysis, logical thinking and problem-solving skillsProjects1.Assist in formulating and execute project governance, monitors and controls.2.Assist in formulating project tracking and execute progress monitoring.3.Will be project knowledge source of reference for the project team.4.Coordinating and streamlining all activities within a project.Change1.Execute plans in managing people and organization changes.2.Involved in planning and executing communication, trainings, and stakeholder management.3.Lead the support and alignment to project activities.
福利制度
・AL: 16d
・MC: 22d
・Handphone Allowance = RM 50
・Medical Claim: Single RM 1,800, Married RM 2,250
・Hospitalization Leave = 60d
・Hospitalization Claim: up to RM 60k
・Season Parking: Paid on monthly reimbursement basis
・Fitness Allowance: Claimable up to RM 360 per quarter or RM 120 monthly
・Dental, Optical claim
・Regular Company Events: Sports Tournament, Outdoor Activities
・Bonus based on company and individual performance
・Access to fitness, dental, and optical benefits.
・Regular company events, including sports tournaments and community activities.Senior HR & Admin Executive (Mid Valley)ID:59477
5,000 MYR ~ 6,000 MYRBangsar工作内容
- HR lifecycle -Payroll & Recruitment- Maintain strict confidentiality and handle sensitive employees’ data- Onboarding and offboarding- HR daily operation- Renewal of GPA, GHS Insurance & Life Insurance, arrange health screening- Training & Development (HRD Corp - apply Grant, Levy & Claim)- Employee Relations & Engagement -work with senior management to resolve employee relations issues pragmatically- Compliance & Legal (Labor law, Government statutory, audits, policies/handbook & etc)- Expatriate’s Permanent Resident (PR) & Employment Pass renewal/application- Expatriate’s government statutory- Issue internal memo, gazetted PH & etc- Handle general office administration, facilities and supplies- Ad hoc works as assigned
福利制度
•Salary: RM5,000 - 6,000
•EPF
•SOCSO
・bonus : Once a year (average 4month/ depend on company perfomance)
•Commissions can sometimes reach up to RM15,000, though the average is around RM6,000.
•EIS(Employment Insurance System)
•AL:12days
•MC(Sick Leave):14days
•SIM card （for smart phone) provided
•Company pays for transportation and sales activities (toll & parking claimable for business purposes)
•Competitive basic salary & commission scheme.
•Car allowance, petrol card, company’s phone and sim card provided.
•Attractive yearly bonus pay & yearly increment.
•Local & Oversea Company Trip.
•At least one week off during Chinese New Year & Hari Raya celebration without AL or UL deduction.
•Extra one day off on every 31st December.
•Group Personal Accident (GPA) coverage upon confirmation.
•Life insurance coverage for employment 5 years and above.
•Company provides health screening once in 2 years.Sr Memory Circuit Design EngineerID:59447
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
We are seeking a Memory Circuit Design Engineer to design and verify high-performance, low-power SRAM and/or multi-port Register Files (RF) macros for integration into Memory Compiler software. You will own transistor-level design and simulations from specification through silicon correlation.Key Responsibilities• Design SRAM and/or multi-port Register Files (RF) circuits at transistor level (bitcell and periphery). • Define memory architecture/topology to meet power, performance, area, yield and Vmin targets.• Run schematic capture & SPICE simulations across PVT corners & Monte Carlo to close read/write margins.• Analyze & optimize critical paths (decoders, wordline drivers, sense amps, write drivers, IO) for speed & robustness.• Create concise margin/performance reports & track design closure metrics.• Drive post-layout verification with extraction & sign-off simulations; partner with layout for pitch- matched arrays.• Work with Design Automation/Software Team/EDA vendor• To integrate Memory circuits into Memory Compiler system• To automate/generate collateral views & timing/power models (Liberty/LEF/Verilog or equivalent)• Support silicon bring-up, characterization and simulation-to-silicon correlation.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Silicon Validation EngineerID:59446
8,000 MYR ~ 19,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
We are seeking a Silicon Validation Engineer to lead silicon bring-up and post-silicon characterization of new Testchips. This hands-on lab role drives test development, automation, data analysis, and cross-team debug closure from power-on to characterization sign-off.Key Responsibilities• Lead Day-0/Day-1 bring-up: safe power-up, clocks/resets, basic access, and smoke tests on first silicon.• Define and execute post-silicon validation/characterization plans with clear milestones and pass/fail criteria. • Develop and deploy silicon tests (bare-metal/low-level software) and maintain repeatable test procedures. • Build automation for test execution, data capture, and regression (Python preferred).• Collect and analyze characterization data (e.g., performance, power, voltage/temperature margins); summarize trends and anomalies.• Triage and debug silicon failures; drive root-cause with design/verification/firmware teams and validate fixes/workarounds.• Improve debug efficiency by proposing/leveraging on-chip observability (registers, counters, logs) and lab measurement methods.• Document lab setup, test methods, results, and silicon errata; create silicon reports; communicate status, risks, and recommendations.• Define specifications for eval/char boards.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Staff IP Logic Design EngineerID:59445
8,000 MYR ~ 15,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
The Senior IP Logic Design Engineer will be responsible for the design and implementation of logic design, microarchitecture definition, RTL coding, IP releases, high speed timing convergence, and collaboration with cross-functional teams to meet project specifications. Tasks also functional validation through black box and white box validation, FPV validation, functional validation as well as emulations.Key Responsibilities:1. IP Design Responsibility• Define and design Unit Level / Layer Level IP Design that able to converge timing at high end process node, with high frequency requirements.• Ability to produce testplans to cover design requirement2. IP Quality Responsibility• Ability to execute design validations, FPV, lintra, CDC and etc tools3. IP Releases• Owning the IP Releases for customer release depending on the assignment
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior/Staff/Principal Engineer, Circuit DesignID:59444
6,500 MYR ~ 8,500 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
• Design and implement high speed interfaces and complex mixed-signal circuits using cutting-edge CMOS tech and EDA tools.• Design block IO blocks such as compensation circuit, reference voltage, transmitters and receivers.• Sub blocks include and not confined to , high speed serializers and deserializers, high speed levelshifters , predrivers , drivers , Feed Forward Equalization , DFE , CTLE.• Block to pass rigorous quality and reliability like EM-IR , Aging , Overstress• Run initial SI analysis and IBIS/IBIS-AMI creations.• Timing closure using Prime-Time or equivalent methods.• Work on serial and parallel interfaces.• Work closely with mask designers to deliver the physical design and assist with silicon evaluation.• Perform architecture studies, circuit designs & simulations, floor-planning, instructing mask designers, reliability verifications and silicon bring-up.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementNoC Senior Design EngineerID:59416
8,000 MYR ~ 15,000 MYRBayan Lepas, Bayan Baru工作内容
Role Overview We are seeking Senior Design Engineer specializing in Network-on-Chip (NoC) to join our cutting-edge semiconductor team. This role involves architecting, designing, and optimizing NoC interconnect solutions for high-performance chips. You will work closely with architects, verification engineers, and software teams to deliver scalable, efficient, and low-latency interconnect designs. Job Description: • NoC Architecture/Micro-architect & Design: Develop and optimize high-performance, scalable, and low-latency NoC solutions for SoCs and multi-core processors. • Performance Analysis: Conduct traffic modeling, simulation, and bottleneck analysis to optimize NoC throughput and latency. • Verification & Validation: Collaborate with verification teams to develop testbenches, ensure functional correctness, and debug issues. • Power & Area Optimization: Optimize NoC designs for low-power and area-efficient implementations, working closely with physical design teams. • Integration & Customization: Work on custom NoC configurations, integrating third-party IPs, and tailoring interconnect solutions for specific applications. • Tool & Flow Development: Enhance NoC design methodologies by developing scripts, automation flows, and performance monitoring tools. • Cross-functional Collaboration: Work with chip architects, backend engineers, and software teams to define NoC requirements and optimize for real-world workloads.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior RTL Design EngineerID:59415
10,000 MYR ~ 20,000 MYRBayan Lepas, Bayan Baru工作内容
Role DescriptionThis is a full-time on-site role based in Penang for a Senior RTL Design Engineer specializing in Memory PHY and Controller IP.. The engineer will take ownership of logic sub-blocks within the PHY, contributing to RTL implementation, functional verification, and timing/power constraint definition. The role requires close collaboration with design verification (DV), firmware, and physical design teams to ensure high-quality, high-speed RTL that meets power, performance, and area (PPA) goals.The candidate should have a strong foundation in RTL design, timing analysis, and design methodology best practices, and be capable of driving design closure through disciplined debugging, scripting, and continuous flow improvements.Key Responsibilities1. Block Ownership and RTL Design Implementation• Take ownership of assigned logic sub-blocks within the Memory PHY or Controller IP.• Contribute to RTL design, code review, and integration in collaboration with PHY and full-chip design teams.• Ensure compliance with architecture specifications and coding guidelines.• Understand PHY–Firmware interaction for training, calibration, and initialization sequences.• Develop local testbenches to functionally verify assigned PHY sub-blocks.• Collaborate with DV engineers to debug simulation failures, analyze waveforms, and identify root causes for corner-case issues.2. Behavioral Modeling and Verification Support• Develop and maintain behavioral models for PHY sub-blocks.• Ensure equivalence between behavioral models and schematics through established equivalence-check (LEC/FEV) flows.• Provide model updates to align with design and architectural changes.3. Constraint and Power Intent Definition• Participate in the creation and validation of SDC (timing) and UPF (power intent) files for sub-blocks and/or the top-level PHY.• Validate constraint correctness and ensure smooth handoff to STA and physical design teams.4. Static Verification (Lint / CDC / RDC)• Run Lint, CDC, and RDC checks for sub-blocks and top-level PHY.• Review and debug violations, provide waivers with technical justification.• Support and guide the design team in interpreting and resolving RDC-related issues.5. Code Coverage and Waivers• Support DV team in achieving code coverage closure, reviewing unhit regions, suggesting test scenarios, and writing justified waivers.• Participate in coverage reviews and track closure progress toward sign-off.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementElectrical Engineer (Bentong)ID:59399
7,000 MYR ~ 12,000 MYRPahang工作内容
We are seeking a highly skilled and proactive Electrical Engineer to join our technical team in Bentong. You will be responsible for ensuring the reliability, safety, and efficiency of the electrical power distribution systems and specialized manufacturing equipment at our rubber thread production facility. The ideal candidate will have hands-on experience with high-voltage systems and the technical grit to manage the unique electrical demands of a continuous latex processing plant.Key Responsibilities- Power System Management: Oversee the operation, maintenance, and troubleshooting of the 11kV Generator, as well as all High Voltage (HV) and Low Voltage (LV) distribution boards and transformers.- Production Support: Maintain and optimize electrical components specific to rubber thread manufacturing, including precision heating elements, high-speed winding motors, and centrifugal systems.- Instrumentation & Control: Calibrate and repair instruments related to temperature control, flow meters, and pressure sensors essential for stable latex processing.- Preventive Maintenance: Design and execute scheduled maintenance programs to minimize downtime in a 24/7 manufacturing environment.- Safety & Compliance: Ensure all electrical installations and practices comply with Suruhanjaya Tenaga (ST) regulations and DOSH standards.- Project Oversight: Manage electrical upgrades, energy efficiency initiatives, and the installation of new machinery.
福利制度
- Annual Leave 12 days
- 13th months salary
- Accommodation provided
- Higher than industry average performance bonus
- Outpatient Medical (including spouse and dependent) and Dental benefit (Employee only)
- Group hospitalization (including spouse and dependent) and Group Personal Accident (Employee only)
- Public holiday falls on a Saturday, one day is credited to the leave credits
