49个职位: 峇央峇鲁 Bayan Baru最新招聘信息
Senior Software Engineer (PLC) ID:60017
6,000 MYR ~ 8,500 MYRBayan Baru工作内容
• Design, development, and implementation of PLC and/or PC based software solutions• Perform system integration, testing and commissioning of advanced control systems for equipment automation system.• Participate in control system requirement analysis.• Involved in drafting of functional specifications and detailed design specification.• Provide technical onsite support to external and internal customers.• Interpret client requirements, identify design parameters, and ensure solutions are implemented accurately and within budget to meet project requirements and schedules• Ensure software issues are resolved in a timely manner
福利制度
Salary package: ~RM5,000 - RM7,000
AL: Starting from 12 days
SL: 14 / 18 / 22 days
<Others>
• Mobile phone reimbursements/transport allowances
• Medical insurance
• Medical claim
*The rest of the benefits, they will be able to share during interview sessionSenior Mechanical Design EngineerID:60011
5,000 MYR ~ 8,000 MYRBayan Baru工作内容
• Conduct equipment design & development work according to customers and internal specifications.• Act as project lead to plan, organize and co-ordinate their respective project’s meetings to review design and ensure projectsare kept to schedule.• Maintain and control relevant documents related to R & D activities per requirements.• Maintain, keep track, and ensure Billed Materials is updated.• Generate detailed 2D/3D drawings• Raise ECN for update of changes to design and drawings and follow up on approval and ECN flow.• Provide technical support to process & production, supply chain & QA for review and troubleshooting of design and drawings
福利制度
Salary package: ~RM5,000 - RM7,000
AL: Starting from 12 days
SL: 14 / 18 / 22 days
<Others>
• Mobile phone reimbursements/transport allowances
• Medical insurance
• Medical claim
*The rest of the benefits, they will be able to share during interview sessionAccount Manager (Semiconductor)ID:60008
8,000 MYR ~ 10,000 MYRTanjung Tokong, Tanjung Bungah, Gelugur, Georgetown, Jelutong, Air Itam, Bayan Lepas, Bayan Baru, Batu Maung, Bukit Jambul, Perai, Sebarang Jaya, Butterworth, Bukit Mertajam, Simpang Ampat, Juru, Nibong Tebal, Bukit Minyak, Batu Kawan工作内容
A leading Japanese manufacturer of high-reliability test sockets & burn-in solutions, is expanding in Penang. We’re looking for a results-driven Account Manager to grow our business in the region.What You’ll Do• Drive new business opportunities while managing key accounts• Identify and develop new projects within semiconductor customers (MNCs & OSATs - Outsourced Semiconductor Assembly and Test)• Engage customers on both technical and commercial discussions• Prepare quotations, follow up, and close deals• Build strong relationships with engineers, buyers, and decision-makers• Track pipeline, market trends, and competitor activity
福利制度
- Performance Bonus
- Annual Leave: 8–16 days per year, depending on how long the employee has worked with the same employer as per Msian Employment Act
- Public Holiday : As per gazetted public holidays in Malaysia.
- Fixed car allowance
- Phone allowance
- Full claimable expensesSIPI Engineer (Senior/Staff/Principal)ID:59941
10,000 MYR ~ 20,000 MYRBayan Lepas, Bayan Baru工作内容
Job SummaryResponsible for Signal Integrity and Power Integrity (SI/PI) analysis, simulation, lab validation, and customer support for high-speed digital interfaces across chip, package, and board levels.Key ResponsibilitiesSignal Integrity• Simulation for high-speed interfaces: HBM, DDR, LPDDR, UCIe, MIPI• Crosstalk, reflection, impedance, and eye-diagram analysis• Transmission line modeling and stackup reviewPower Integrity• Power delivery network (PDN) analysis and optimization• Decoupling capacitor selection and validation• PDN impedance measurement and simulation correlationTools & Methods• SI/PI tools: HyperLynx, Ansys SIwave, Cadence Sigrity• Lab equipment: TDR, VNA, high-speed oscilloscope• S-parameter, Y/Z-parameter and multi-port matrix analysis Collaboration• Work with chip, package, PCB design, and layout teams• Support customers on board design reviews and technical queries• Participate in design reviews, failure analysis, and root-cause debugging
福利制度
- Annual Leave 14 days
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementProject Manager(Penang)ID:59932
10,000 MYR ~ 15,000 MYRTanjung Tokong, Tanjung Bungah, Gelugur, Georgetown, Jelutong, Air Itam, Bayan Lepas, Bayan Baru, Batu Maung, Bukit Jambul, Perai, Sebarang Jaya工作内容
SummaryA construction project manager responsible for planning, scheduling, cost, quality, and safety management, coordinating with site teams, engineers, and subcontractors to ensure smooth execution and maintain As-built documentation.Key Responsibilities- Manage overall project planning, scheduling, quality, cost, and safety for construction projects.- Coordinate with site teams, design engineers, and subcontractors to ensure smooth project execution.- Review and approve construction drawings and design documents to ensure accurate implementation of design intent.- Oversee progress monitoring, budget control, and procurement of materials.- Ensure compliance with Safety, Health, and Environment (SHE) standards and implement risk management measures.- Analyze issues that arise during construction and propose and implement corrective actions.- Maintain and update As-built drawings and related documentation upon project completion.
福利制度
- Annual leave: 10 days
- Medical leave: 14 days
- Medical claims: RM1,000/year
- Accommodation
- OT allowance
- Performance appraisal twice yearly.
Mid year - Increment & promotion
Year end - bonus.Emulation and Prototyping Engineer (Senior/Lead)ID:59881
10,000 MYR ~ 20,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
We are seeking a highly skilled and motivated Senior or Lead Emulation and Prototyping Engineer to define and lead emulation strategies for IP, complex SoC and system-level projects. This role requires a strong technical leader who can work independently, while also collaborating closely with system architects and pre-silicon verification teams to drive successful pre-silicon validation, firmware development, and early software enablement using industry-leading emulation/prototyping platforms.Key Responsibilities:• Define and lead the emulation and prototyping strategy for IP & SoC programs to support architectural validation, functional verification, and software bring-up.• Work closely with chip architects to understand IP & system-level design goals and translate them into emulation requirements and constraints.• Collaborate with pre-silicon design verification engineers to integrate emulation/prototyping into the broader verification strategy and identify high-value use cases.• Partition and map RTL designs to commercial emulation/prototyping platforms (e.g., Cadence Palladium, Synopsys ZeBu, Mentor Veloce).• Develop emulation models, transactors, and hybrid environments (e.g., simulation + emulation or virtual platforms).• Lead bring-up and debug activities of the emulation/prototyping environment, ensuring performance, accuracy, and reusability.• Drive the development of automated test environments, infrastructure, and scripts to enable fast deployment and repeatability.• Support firmware and software teams with stable and functional pre-silicon platforms for development and debug.• Maintain comprehensive documentation including emulation and prototyping setup guides, debug workflows, and system usage instructions.• Mentor junior engineers and evangelize emulation best practices across engineering teams.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementTechnical Sales Engineer (Penang)ID:59817
4,000 MYR ~ 4,500 MYRBayan Baru工作内容
This is a full-time on-site role for a Technical Sales Executive located in Bayan Lepas. The Technical Sales Executive will be responsible for generating and securing new business and maintaining relationships with existing clients. Daily tasks include presenting and demonstrating products, negotiating contracts, providing technical support, and staying up-to-date with the latest industry trends and technology. The role involves collaborating with internal teams to ensure customer requirements are met and exceeded1) Executive activities to take care existing customer and searching for new clients who might benefit from company products or services and maximizing client potential in designated regions as wanted.2) Executive activities that able developing long-term relationships with clients, through managing and interpreting their requirements.3) Persuading clients that a product or service best satisfies their needs in terms of quality, price and delivery4) Negotiating tender and contract terms and condition to meet both client and company needs. 5) Calculating client quotation and administering client accounts. 6) Providing pre-sales technical assistance and product education by provide product training to customers. 7) Working on after sales support services and providing technical back up as required.8) Helping in the design of custom made products and providing training and producing support material for other members of the sales team.9) Preparing sales reports timely to inform leader regarding customer situation and requirement. 10) Key in customer information and need in company system. 11) Supporting marketing activities by attending trade shows, conferences and other marketing events.12) Making technical presentations and demonstrating how a product meets client needs. 13) Liaising with other members of the sales team and other technical experts.14) Follow up payment from customer Key deliverable 1) To increase number of account and sales amount 2) Sales report, key in GCIS and verbal reporting as timely.3) Customer satisfaction for maintaining long term business relationship4) Execute sales activities with minimum supervision.
福利制度
- Salary: RM4,000 - 4,500
- Working Day and Hours Details: 5 day week; working hours from 8:40 am to 5:30 pm. (Lunch break from 12:00pm to 12:50pm)
- Probationary Period: 3 months
- Salary increase rate: Depend from band and performance.
- AL: 1st year: 8 days, 2nd year: 10 days, 3rd year: 12 days, 4th year: 14 days, 5th year: 16 days; the maximum is 18 days in the 6th year.
- MC: 1st year: 14 days, 2nd to 5th years: 18 days, 5 year and above: 22 days.
- EPF, SOCSO, EIS: Provided
- Medical Allowance: RM 80 per receipt; maximum twice per month.
- Insurance: hospital & surgical insurance and personal accident insurance.Advanced Package & Board Team (Senior/Staff/Principal)ID:59718
10,000 MYR ~ 30,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
The Advanced Package & Board Team will lead the design, development, and implementation of advanced IC packaging and board-level solutions that enable high-performance, cost-effective, and reliable silicon products. This role requires strong technical leadership across multiple engineering domains — including substrate/interposer design, board design, SI/PI/thermal analysis, and manufacturing interface — while driving cross-functional collaboration with silicon design, system architecture, and OSAT/EMS partners.The successful candidate will define and execute the company’s packaging and board technology roadmap to support next-generation chiplet-based architectures, 2.5D/3D integration, and heterogeneous systems.Key Responsibilities1. Leadership & Strategy• Lead the Advanced Package & Board Design Team, including substrate, interposer, and PCB design engineers.• Define and execute packaging and board technology strategy aligned with company silicon product roadmap.• Establish design and verification methodologies for advanced packaging (e.g., 2.5D, fan-out, chiplet integration).• Drive innovation in thermal management, signal integrity, and power delivery optimization.2. Technical Execution• Oversee design and validation of interposers, substrates, and system boards from concept to production release.• Guide integration of chiplets, HBM, and passive components using state-of-the-art packaging technologies.• Ensure robust SI/PI, mechanical, and thermal analysis for design sign-off.• Collaborate with silicon design teams on bump assignment, die floorplanning, and package co-design.• Manage board-level design for system bring-up, test platforms, and reference designs.3. Supplier & Ecosystem Management• Engage and qualify OSATs, substrate vendors, and PCB manufacturers to ensure quality and yield.• Partner with EDA vendors to establish design automation flow and DRC verification.• Drive technology transfer and pilot runs with manufacturing partners.4. Project & People Management• Plan resources, schedules, and budgets to ensure timely delivery of packaging and board design projects.• Build and mentor a high-performing team with expertise across electrical, mechanical, and materials engineering.• Foster collaboration across silicon, test, reliability, and operations teams.
福利制度
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Standard Cell Design EngineerID:59656
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
We are seeking a Library Design Engineer to own the end-to-end development of a production-grade standard cell library on leading-edge process nodes. You will drive transistor-level design, multi-Vt cell topology, full characterization, and PPA validation delivering robust, sign-off-ready library views to downstream implementation flows. Seniority level to be determined by experience.Key Responsibilities• Design, simulate, and analyze standard cell circuits at transistor level, including combinational, sequential, clock, and physical utility cells across multiple Vt flavors (HVT/SVT/LVT/ULVT) and drive strengths.• Perform layout process-node-shift; guide layout clean-up effort and review for DRC/LVS compliance, EM/IR rules, and parasitic awareness at the cell level.• Define & execute characterization flow to generate complete library views & models, covering timing (NLDM/CCS/ECSM), power (dynamic, leakage, internal), noise, and variation-aware models (LVF/SOCV/POCV); ensure Liberty, LEF, and GDS consistency.• Define & execute QA regression to check library quality; validate cell robustness including noise margin, drive strength, X-propagation, and scan/DFT cell correctness; drive STA correlation using PrimeTime or Tempus to confirm model accuracy in real PD flows.• Lead standard cell library IP integration into Testchip, including Testchip circuit and test plan development; support hardware bring-up and debug.• Perform pre/post-silicon correlation & model/design optimization; drive root-cause analysis for first-silicon issues and implement yield/robustness improvements.
福利制度
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Analog Circuit Design Engineer (Clocking)ID:59653
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. The candidate should have specialized expertise in Clocking as described below. Seniority level to be determined by experience.Key Responsibilities• Design and debug PLL/DLL architectures and circuits (integer/fractional-N; analog or digital-assisted).• Oscillators: LC or ring-oscillator (RO) VCO/DCO, frequency synthesis, phase noise/jitter analysis and budgeting.• Delay lines, measurement/ruler circuitry, phase interpolators, and calibration/trim techniques.• DCC/DCM/DCA, clock tree/distribution, and clock management units; low-jitter clock generation and distribution networks.• Own end-to-end block/IP delivery: architecture studies, specification, transistor-level design, simulation, post-layout sign-off, and silicon bring-up/characterization.• Behavioral modeling (e.g., Verilog-A/SystemVerilog) to explore loop dynamics, spur/jitter mitigation and system interactions.• Build verification test benches; validate performance across PVT corners, mismatch/Monte Carlo (as applicable), and post-extraction parasitics.• Work closely with layout/mask designers: floorplanning guidance, layout reviews, and ensuring LVS/DRC clean implementation and parasitic awareness.• Meet quality and reliability requirements (e.g., EM/IR, aging/overstress); contribute to robust design methodology and sign-off checklists.• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.
福利制度
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment