15个职位 - 马来西亚换工作: 峇央峇鲁 Bayan Baru地区的最佳职位列表
Branch Manager（Penang）ID:58594
8,000 MYR ~ 9,500 MYRBayan Baru工作内容
- To ensure that the branch target sales achieve orders equal to or in excess of budget.- Lead team of engineers for project management, preparation of quotations, pricing, pricing and etc.- Coordinates and approves pricing, estimating, scoping and marketing strategies for proposed projects- Responsible for control of work-in-process.- Prepares or directs preparation and modification of reports, specifications, plans and designs for the project.- To attend and explain technical specifics to sub-contractors, clients, discussion and meetings.- To liaise and coordinate with authorities/consultant for site inspection and approval.- To prepare project forecast budget, margin, calculation & documentation.- Study, highlight and resolve any discrepancies of drawings, BQ and specifications. To monitor construction projects to ensure that procedures, materials, and equipment comply with approved project plans, specifications, and samples, owner standards and quality.- Resolve any site problems should any arise.
福利制度
Disclose during interview
Field Service Engineer (Northern Region)ID:58625
4,000 MYR ~ 6,000 MYRTanjung Tokong, Tanjung Bungah, Gelugur, Georgetown, Jelutong, Air Itam, Bayan Lepas, Bayan Baru, Batu Maung, Bukit Jambul, Perai, Sebarang Jaya, Butterworth, Bukit Mertajam, Simpang Ampat, Juru, Nibong Tebal, Bukit Minyak, Batu Kawan工作内容
・Machine Installation and set up at client factory・Facilitate and resolve customer’s technical issues up to closure with proactive and effective communication ・Provide technical support and training to client・Troubleshoot Analyzer or Inspection Machine when breakdown・To conduct on maintenance and repair of the machines or facilities・Collaborate with sales colleague to fulfill client needs and maximize sales revenue・Establish detailed inspection, service, and report ・Travel frequently depends on customer demands
福利制度
・Basic Salary = RM 3,400 ~ RM 5,400
・RM 600 Transport Allowances
・OT allowance provided after 5:30 pm
・AL: 10 days AL (1st year) +1 each year from 2nd year
・MD: <2Y 14d, 2~5Y 18d, >5Y 22d
・Annual Medical Insurance
・Insurance coverage individual
・Business Trip Allowance
- RM 30 per day / Domestic business trip
- USD 20 per day / Oversea business trip
・Handphone Allowance
・Petrol, Hotel (RM100/night) claimable
**Accommodation will be arranged for abroad business tripSenior Staff IP Logic Design / MicroarchitectID:58605
15,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
The Senior IP Logic Design Engineer will be responsible for the design and implementation of logic design, microarchitecture definition, RTL coding, IP releases, high speed timing convergence, and collaboration with cross-functional teams to meet project specifications. Tasks also include performance optimization and ensuring design functionality through verification and validation processes.Key Responsibilities:1. IP Design Responsibility• Define and design Unit Level / Layer Level IP Design that able to converge timing at high end process node, with high frequency requirements.• Ability to drive a low power and complex design to completions.2. IP Quality Responsibility• Ability to orchestrate the team on validation requirements to catch all possible boundary conditions of logic bugs.3. IP Releases• Deep knowledge on Lint and CDC flow and ability to drive the Lint and CDC convergence.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Staff IP Logic Design / MicroarchitectID:58607
8,000 MYR ~ 15,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
The Senior IP Logic Design Engineer will be responsible for the design and implementation of logic design, microarchitecture definition, RTL coding, IP releases, high speed timing convergence, and collaboration with cross-functional teams to meet project specifications. Tasks also functional validation through black box and white box validation, FPV validation, functional validation as well as emulations.Key Responsibilities:1. IP Design Responsibility• Define and design Unit Level / Layer Level IP Design that able to converge timing at high end process node, with high frequency requirements.• Ability to produce testplans to cover design requirement2. IP Quality Responsibility• Ability to execute design validations, FPV, lintra, CDC and etc tools3. IP Releases• Owning the IP Releases for customer release depending on the assignment
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementIP Logic Design Principle EngineerID:58602
20,000 MYR ~ 30,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
The IP Logic Design Principle Engineer will be responsible for architecting microarchitecture design implementation of an IP, spanning across all IP stack such as application layer, transaction layer, link layer, die to die layer, physical layer. Ability to code verilog / system verilog RTL for complex IP, review RTL coding, orchestra IP development phase for projects from beginning to completion. This includes the ability to technically drive the IP team on Design / Validation in completing technical tasks up to IP releases for customers. Candidate must be also capable of solving high speed timing convergence on various processes and collaborate with cross-functional teams to meet project specifications. The role will drive performance optimization and ensuring design functionality through verification and validation processes.Key Responsibilities:1. IP Microarchitecture Definitions• Define microarchitecture definition across layers and define a clean inter unit partition requirements.• Drive design team to deliver best-in-class IP design that optimizes for area, latency, power and performance.• Ability to distribute and drive the design team to implement high quality design and meeting time to market requirements.2. IP Design Responsibility• Implement very complicated high-speed design which can converge timing convergence at high frequency.• Capable of orchestrating the team on right directions of timing convergence, CDC, lintra and etc. for tools closure.3. IP Quality Responsibility• Review IP design and validation testplan to make sure IP Design is at top notch quality.4. IP Releases• Deep knowledge on Lint and CDC flow and ability to drive the Lint and CDC convergence.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementIP Engineering DirectorID:58600
25,000 MYR ~ 40,000 MYRBayan Lepas, Bayan Baru工作内容
Highly skilled and visionary IP Engineering Director, to lead the development and delivery of reusable semiconductor IP that powers advanced SoCs, chiplets, and multi-die solutions. This role requires deep expertise in semiconductor IP design, verification, and integration, combined with proven leadership in building and managing engineering teams. While the position is primarily focused on hardware IP development (digital, analog, or mixed-signal), software development experience—such as firmware, device drivers, or modeling frameworks—is a strong plus, enabling HW/SW co-design, system-level optimization, and accelerated customer adoption. The IP Engineering Director will define technical roadmaps, oversee execution, and collaborate with cross-functional teams to deliver silicon-proven IP solutions that meet aggressive power, performance, and area (PPA) targets.Key Responsibilities1. Leadership & Strategy• Define and execute the company’s IP engineering roadmap aligned with product strategy.• Build and lead a world-class IP engineering team across design, verification, validation, and integration.• Mentor and develop engineering leaders, fostering innovation, collaboration, and technical excellence.• Drive continuous improvement in design methodology, automation, and productivity.2. IP Development & Execution• Lead architecture, micro-architecture, and RTL design of reusable IP (e.g., memory interfaces, high-speed I/Os, interconnects, SerDes, or accelerators).• Oversee verification, validation, and sign-off, ensuring robust, silicon-proven IP delivery.• Collaborate with SoC, package, and system teams for seamless integration into chiplet and multi-die systems.• Support post-silicon debug, bring-up, and customer deployment of IP blocks.3. Cross-Functional Collaboration• Partner with software teams on firmware, drivers, and simulation frameworks to ensure full-stack enablement.• Engage with product, SoC, and system architects to align IP functionality with end-market requirements.• Collaborate with foundries, EDA vendors, and ecosystem partners to enhance IP design flows and deployment.4. Program Management & Delivery• Own IP program planning, milestones, schedules, and risk management.• Ensure timely delivery of high-quality IP to internal design teams and external customers.• Drive design reuse and scalability across multiple projects and product lines.5. Execution & Delivery• Own NoC project planning, execution, and delivery, ensuring schedule adherence and quality.• Establish and improve design methodologies, verification flows, and automation for rapid, reliable development.• Support bring-up, debug, and performance validation in both pre-silicon and post-silicon environments.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementNetwork-on-Chip (NoC) Team Engineering DirectorID:58599
25,000 MYR ~ 40,000 MYRBayan Lepas, Bayan Baru工作内容
This role will lead the architecture, design, and development of high-performance interconnect solutions for SoCs, chiplets, and advanced packaging systems. The ideal candidate will have deep expertise in NoC architecture, RTL/micro-architecture design, performance modeling, and verification, combined with strong leadership skills. Experience in both hardware and software development is a strong plus, as it enables system-level optimization, modeling, and seamless HW/SW co-design for next-generation NoC solutions. The NoC Team Director will drive technical strategy, manage execution, mentor a multidisciplinary team, and collaborate with cross-functional partners to deliver state-of-the-art interconnect IP for data-intensive and AI-driven applications. Key Responsibilities1. Leadership & Strategy• Define and execute the company’s NoC technology roadmap, aligned with product and system- level requirements.• Build, mentor, and lead a high-performing team of architects, designers, verification engineers, and performance modelers.• Foster innovation in NoC design, methodology, and automation to achieve best-in-class power, performance, and area (PPA).2. NoC Architecture & Design• Lead the design of scalable, configurable, and high-bandwidth NoC architectures for heterogeneous SoCs and multi-die systems.• Drive micro-architecture, RTL design, and integration of NoC subsystems, including coherency, QoS, and security features.• Oversee performance modeling, traffic analysis, and system-level simulation to ensure NoC meets latency and bandwidth requirements.• Collaborate with physical design teams to optimize NoC topology, floorplanning, and timing closure. 3. Cross-Functional Collaboration• Partner with CPU/GPU/AI accelerator, memory subsystem, and IP teams to define NoC interfaces and integration requirements.• Collaborate with software teams on NoC modeling frameworks, traffic generators, drivers, and firmware for validation and optimization.• Engage with product and system architects to align NoC capabilities with end-market requirements (AI/ML, datacenter, automotive, mobile).4. Execution & Delivery• Own NoC project planning, execution, and delivery, ensuring schedule adherence and quality.• Establish and improve design methodologies, verification flows, and automation for rapid, reliable development.• Support bring-up, debug, and performance validation in both pre-silicon and post-silicon environments.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementTechnical ManagerID:58547
10,000 MYR ~ 15,000 MYRTanjung Tokong, Tanjung Bungah, Gelugur, Georgetown, Jelutong, Air Itam, Bayan Lepas, Bayan Baru, Batu Maung, Bukit Jambul, Perai, Sebarang Jaya工作内容
- Interpret and review construction drawings to ensure full understanding of design intent and technical accuracy.- Prepare and update detailed construction drawings using AutoCAD, ensuring precision and compliance with project specifications.- Identify and resolve drawing discrepancies or clashes through coordination with architectural, structural, and M&E teams.- Provide on-site technical support, guiding construction teams based on drawing interpretation and technical standards.- Check and verify drawings submitted by subcontractors to ensure accuracy and compliance with design requirements.- Coordinate with project managers and engineers to ensure smooth implementation of design at site.- Maintain and update as-built drawings and documentation upon project completion.
福利制度
- Annual leave: 10 days
- Medical leave: 14 days
- Medical claims: RM1,000/year
- Accommodation
- OT allowance
- Performance appraisal twice yearly.
Mid year - Increment & promotion
Year end - bonus.【Johor】 Sales ExecutiveID:58432
2,500 MYR ~ 3,500 MYRTanjung Tokong, Tanjung Bungah, Gelugur, Georgetown, Jelutong, Air Itam, Bayan Lepas, Bayan Baru, Batu Maung, Bukit Jambul, Perai, Sebarang Jaya, Butterworth, Bukit Mertajam, Simpang Ampat, Juru, Nibong Tebal, Bukit Minyak, Batu Kawan工作内容
• Responsible for achieving sales results in accordance with set targets within a specific territory• Handling of existing client & developing new clients • Make cold calls and arrange appointments with new clients.• Cultivate relationships with new customers while managing and servicing an existing customer base.• To have regular customer visits complete with full coverage of your designated territory in establishing :－ a) customers' requirements. b) customers' future plans / projects, etc. c) customers' feedback (price, quality, competitors' activity, etc)• To follow－up closely on all sales inquiries, requests or quotations and ensure to fulfill total customers satisfaction• To assist Credit Control Department for due collection from customers• To constantly upgrade and improve yourself in terms of product knowledge, technical skills and selling skills• Report sales activities regularly to the superior.
福利制度
Probation Period
－ Business travel claimable : RM 0.60/km
After Confirmation
－ Petrol Card : Penang (Amount TBC)
－ Car Allowance : Penang (Amount TBC)
－ Commission : 0.7% upon money collection (commission RM 1k, depending on collection of payment)
－Dental benefits
－Yearly bonus = Average 1 monthSenior Layout and Physical Design EngineerID:58373
6,000 MYR ~ 15,000 MYRBayan Lepas, Bayan Baru工作内容
We are seeking analog/mixed-signal IP layout and physical design to lead layout implementation, RTL-to-GDSII execution and mentor juniors while working with top EDA tools. Be part of a team building high-performance semiconductor solutions. Job Description:• Independently execute layout of analog/mixed-signal IP blocks (e.g., ADCs, LDOs, PLLs, bandgaps, IOs)• Work closely with logic and circuit designers to meet performance, area, and matching constraints• Support top-level floorplanning and layout integration• Perform DRC/LVS/PEX and support sign-off processes• Participate in technical reviews and contribute to best practices in layout & physical design methodology• Block execution of physical design, including synthesis, Place and Route and Design and Timing Closure• Lead and guide junior engineers on the block execution
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment
