45 Jobs: Software/Information Processing
Supply Chain Management Executive (JB)ID:61259
3,500 MYR ~ 4,500 MYRJohor BahruJob Description
The SCM Executive is responsible for global category management of raw materials and supply chain activities in RDD locally. This includes strategic relationship, supplier performance review and improvement of the supply base.Key Responsibilities:• Identify and implement initiatives to improve supplier base and supply assurance (such as new/current approved sources, quality, lead time, delivery, & cost)• Lead the RFQ and manage the Direct commodities in Standard / Fabrication parts by ensuring materials & services supply to approved specification and meeting the department goals.• Establish and maintain good relationships with suppliers by promoting continuous technology improvement through regular communication and evaluation to meet customer needs.• Negotiate and practise best of 5Rs in each RFQs and contract terms with suppliers to achieve value of money• Act as a business partner with related function such as (BU, RDD & Project) throughout entire procurement process & system operation, by ensuring the efficient delivery to meet targeted time line.• Coordinate and resolve issues that arise during the procurement and supply chain process to ensure project deliverable in a timely and quality manner. • Complete & comply with supply chain & procurement process operations and other tasks assigned by leader or direct supervisor.
Benefit
- Phone allowance
- OT allowance
- Optical / Dental = RM300
- Medical = RM500
- Annual Leave
- Compassionate Leave
- Marriage Leave
- Travel AllowanceMemory IP Architect / SoC uArchitectID:61253
8,000 MYR ~ 35,000 MYRBayan Lepas, Bayan BaruJob Description
Role OverviewWe are seeking a Senior Design Engineer specializing in Network-on-Chip (NoC) to join our cutting-edge semiconductor team. This role involved architecting, designing, and optimizing NoC interconnect solutions for high-performance chips. You will work closely with architects, verification engineers, and software teams to deliver scalable, efficient, and low-latency interconnect designs.Key Responsibilities• NoC Architecture & Design: Develop and optimize high-performance, scalable, and low-latency NoC solutions for SoCs and multi-core processors, components, ensuring performance, area, and power efficiency.• Performance Analysis: Conduct traffic modeling, simulation, and bottleneck analysis to optimize NoC throughput and latency.• Verification & Validation: Collaborate with verification teams to develop testbenches, ensure functional correctness, and debug issues.• Power & Area Optimization: Optimize NoC designs for low-power and area-efficient implementations, working closely with physical design teams.• Integration & Customization: Work on custom NoC configurations, integrating third- party IPs, and tailoring interconnect solutions for specific applications.• Tool & Flow Development: Enhance NoC design methodologies by developing scripts, automation flows, and performance monitoring tools.• Cross-functional Collaboration: Work with chip architects, backend engineers, and software teams to define NoC requirements and optimize for real-world workloads.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementMemory IP Architect / SoC uArchitectID:61252
8,000 MYR ~ 35,000 MYRBayan Lepas, Bayan BaruJob Description
We are looking for an experienced Memory IP Architect / uArchitect to lead the architecture and development of next-generation memory solutions for AI, HPC, networking, and custom ASIC applications.This role will drive the definition of memory subsystems, memory controllers, and high-performance SoC memory solutions from concept through silicon.Responsibilities• Define architecture and specifications for Memory IP and SoC subsystems.• Lead memory architecture for DDR5, LPDDR5X/LPDDR6, HBM3E/HBM4, and cache subsystems.• Drive architecture trade-offs across performance, power, area, and cost.• Develop performance models and conduct architecture exploration.• Define memory hierarchy, and system-level optimization strategies.• Collaborate with RTL, DV, DFT, PD, Packaging, Firmware, and Software teams.• Support customer engagements, technical reviews, and roadmap planning.• Guide implementation through silicon bring-up and performance tuning.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementRTL Design Engineer (Junior/Senior)ID:61251
8,000 MYR ~ 35,000 MYRBayan Lepas, Bayan BaruJob Description
Position OverviewWe are seeking RTL Design Engineers at Junior/Intermediate and Senior levels to join our Hardware Engineering team, focusing on ASIC and SoC design.The successful candidates will be responsible for RTL development, functional verification, simulation, debugging and design quality throughout the front-end design flow. Depending on experience and seniority, the role will involve implementing well-defined RTL blocks under guidance or independently owning RTL blocks from specification through verification closure and sign-off.Key ResponsibilitiesA. RTL Design & Development- Develop synthesizable RTL using Verilog and/or SystemVerilog in accordance with design specifications and team coding guidelines.- Implement and maintain RTL blocks for ASIC and SoC designs, ensuring functionality, code quality and design efficiency.- Apply synchronous design principles, including clocking, reset strategies, data valid/ready handshaking and clock domain crossing (CDC) techniques.- Design and maintain functional blocks such as finite state machines (FSMs), FIFOs, arbiters, register files, control logic and data paths.- Work with standard bus protocols, including APB and AHB-Lite, with awareness of AXI4.- Consider area, power and performance (PPA) implications when developing and optimizing RTL.- Collaborate with design, verification, physical design (PD), DFT and other cross-functional teams to resolve design issues and improve implementation quality.Junior / Intermediate Level- Implement well-defined RTL blocks based on detailed microarchitecture specifications under the guidance of senior engineers or technical leads.- Develop foundational knowledge of RTL design methodologies, synthesis implications, CDC concepts and low-power design techniques.- Participate in design reviews, identify potential corner cases and proactively raise technical questions or design concerns.- Improve RTL quality and design efficiency based on code review feedback.Senior Level- Independently own RTL blocks from specification review and design implementation through verification closure and sign-off.- Contribute to microarchitecture definition, design specification documentation and technical design reviews.- Optimize RTL for timing closure, area and power through techniques such as pipelining, retiming and appropriate coding strategies.- Implement and evaluate low-power design techniques, including clock gating, isolation cells and retention flops.- Resolve complex RTL design issues and work with physical design teams to address timing and place-and-route feedback.- Provide technical guidance and informal mentoring to junior engineers.B. Functional Verification & Simulation- Develop and execute directed and self-checking SystemVerilog testbenches to verify RTL functionality.- Run simulations, debug functional failures and analyze waveforms using industry-standard tools.- Write SystemVerilog Assertions (SVA) to capture design intent and verify key interface requirements.- Apply functional coverage concepts to assess verification completeness and identify potential coverage gaps.- Collaborate with design verification engineers to investigate issues and ensure design quality.Junior / Intermediate Level- Develop directed testbenches for assigned RTL blocks and execute simulations using tools such as Synopsys VCS, Questa or Icarus Verilog.- Perform waveform debugging using Verdi, DVE or equivalent tools.- Demonstrate basic understanding of UVM concepts, including agents, sequences and scoreboards.- Add basic functional coverage points and develop familiarity with assertions and verification methodologies.Senior Level- Develop and debug more comprehensive testbenches and contribute to UVM agents, sequences and verification environments.- Interpret coverage reports and drive functional coverage closure in collaboration with verification teams.- Apply assertions, assumptions and cover properties, with exposure to formal verification methodologies.- Investigate complex simulation failures and contribute to root-cause analysis across RTL, verification and integration issues.C. Design Quality, Sign-Off & Integration- Ensure RTL designs comply with applicable design specifications, coding standards and quality requirements.- Review simulation results, lint reports and timing information to identify and resolve potential design issues.- Understand the impact of RTL changes on synthesis, timing, integration and downstream implementation.- Collaborate with verification, DFT and physical design teams throughout the design lifecycle.Junior / Intermediate Level- Develop an understanding of static timing analysis (STA), including setup and hold violations.- Resolve common lint warnings and develop familiarity with CDC analysis and synchronizer insertion.- Understand basic DFT concepts, including scan chains and test modes.- Support design reviews and sign-off activities under senior engineer guidance.Senior Level- Interpret STA reports, timing slack and critical paths, and implement RTL changes to address timing issues.- Resolve common CDC and reset domain crossing (RDC) violations and lint issues.- Apply DFT awareness when designing RTL and supporting scan insertion and test mode requirements.- Work closely with physical design teams to resolve implementation-related issues and support design sign-off.- Take ownership of RTL quality and verification closure for assigned blocks.D. Scripting, Automation & Design Tools- Use scripting languages and automation tools to improve design, simulation and debugging efficiency.- Work with existing simulation flows, tool scripts, file lists and build configurations.- Analyze simulation logs and support the maintenance of design and verification workflows.Junior / Intermediate Level- Write basic Python, Tcl or shell scripts to automate repetitive simulation tasks.- Edit existing Makefiles and Tcl run scripts and parse simulation logs.- Demonstrate proficiency in at least one industry-standard simulation tool.Senior Level- Develop and maintain Python, Tcl or shell scripts for simulation automation, regression execution and log analysis.- Manage file lists, hierarchy extraction and simulation flow configurations.- Troubleshoot tool-flow issues and improve automation efficiency where appropriate.- Utilize synthesis and formal verification tools as required by the project.E. Technical Collaboration & Continuous Improvement- Collaborate with cross-functional engineering teams to support successful ASIC/SoC design implementation.- Participate in design reviews, technical discussions and knowledge-sharing activities.- Maintain clear design documentation and communicate technical issues, progress and blockers effectively.- Continuously improve technical knowledge of RTL design, verification methodologies and EDA tools.Junior / Intermediate Level- Work collaboratively within an established design team, seek clarification when requirements are unclear and incorporate feedback from senior engineers.- Provide timely progress updates and proactively communicate design issues or blockers.Senior Level- Drive technical discussions for assigned RTL blocks and document design decisions and implementation considerations.- Coordinate closely with design verification, DFT, physical design and software teams to resolve technical issues.- Mentor junior engineers and contribute to improving team design practices.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementAccount Manager ID:61233
6,000 MYR ~ 8,500 MYRSeputehJob Description
We're looking for an Account Manager to grow and deepen our existing client relationships - not just maintain them. This is a proactive, growth-oriented role: you'll expand our footprint within current accounts by building relationships with new contacts, departments, and branches, while using AI tools to deliver better efficiency and efficacy. • Grow revenue from existing accounts by expanding relationships across contacts, departments, and branches• Proactively identify and pursue new opportunities wihtin existing accounts• Build long-term client relationships by genuinely understanding their business, not just their next request• Respond to client requests promptly with well-tailored proposals and solutions • Lead negotiations and manage client onboarding and contracts• use AI tools daily to work more efficiently across research, outreach, proposals, and planning• Partner with internal teams to ensure smooth delivery and healthy account margins
Benefit
Basic: RM6,000 - RM8,500
AL: Starts with 12 days
ML: Starts with 14 days
<Other benefits>
• Monthly transportation allowance: RM200 (Claim basis)
• Health check costs of up to RM1,000 per annum
• Medical and dental cost up to RM1,000 per annum
• Non-commission basis, but this role will have (bi-annual) special incentives + achievement bonus + regional incentives (if they hit their KPI/achievement)SAP Functional Support Executive / Senior Executive (MM)ID:61141
5,000 MYR ~ 7,500 MYRKota Damansara/Petaling JayaJob Description
■ JOB SUMMARYTo provide first level functional support for SAP, Regional IT applications and Local IT systems serving group companies.The role acts as a key liaison between business users, Regional IT teams, consultants, and technical teams to ensure smooth IT operations, continuous business process improvement, user support, training, compliance, and project implementation.■ KEY RESPONSIBILITIES1. Application Support• Provide first level support to company users on SAP Procure-to-Pay (PTP/MM) and backup for Order-to-Cash (OTC/SD).• Act as the primary point of contact between group business users and Regional IT teams for all matters relating to Regional IT applications and local system vendors to troubleshoot system issues and coordinate resolution with relevant technical teams and consultants.2. User Access and Security Administration• Assist in user ID creation, modification, suspension, and deactivation.• Coordinate access requests and approval workflows for SAP, Regional and Local IT systems.• Ensure timely processing of user access requests while maintaining compliance with security requirements.3. SAP S/4HANA Project Participation• Participate in SAP S/4HANA projects as a business support coordinator, assisting business users in requirement gathering, testing, training, issue resolution, and post-go-live support to ensure successful system adoption and business continuity.4. Documentation and Knowledge Management• Develop and maintain user manuals, standard operating procedures (SOPs), and process documentation for SAP, Regional and Local IT applications.• Ensuring documentation reflects current PM and PACMY business processes.• Maintain a knowledge repository for recurring issues and solutions.5. Testing and Training• Coordinate and support User Acceptance Testing (UAT) activities.• Prepare test scenarios and assist users throughout testing cycles.• Conduct end-user training and knowledge transfer sessions.• Provide user guidance and post-training support.7. Business Process Improvement• Work closely with business users to understand operational challenges.• Analyze current business processes and identify opportunities for improvement.• Recommend process enhancements and system optimization initiatives.8. IT Governance, Audit and Compliance• Serve as the first point of contact for IT-SOX, internal audits, and compliance reviews relating to Local IT systems.• Support evidence collection and audit inquiries.• Coordinate remediation activities arising from audit findings.9. Segregation of Duties (SoD) Management• Act as liaison between Regional IT teams and business users for SoD reviews.• Review SAP role conflicts, access controls, and transaction authorizations.• Support periodic access reviews and compliance monitoring.
Benefit
・AL = <2Y 15d, 2~5Y 19d, >5Y 22d
・MC = <2Y 14d, 2~5 18d, >5Y 22d
・Mobile Allowance = RM 100
・Transport Allowance = RM 450
・All business travel claimable
・Outstation Allowance (amount based on location)
・Overseas Allowance (amount based on location
・Mileage = RM 0.70 / km (within Klang Valley travel)
・Medical Claim = RM 10,000 / year (including specialist)
・Flexi Plan up to RM 1,000 (Including dental, optical, and productivity gadgets)
・Insurance: Tokio Marine (PA, Hospitalization)
・Company Activities: Annual Dinner (by division), Sport Carnival (for all Panasonic group companies)
・Mobile Phone Allowance (Upon confirmation)
・Dental, Vision, Outpatient, Group Hospitalization, etc.Process Engineer (PG)ID:61102
4,000 MYR ~ 10,000 MYRBatu KawanJob Description
- Responsible for project debugging work, including equipment installation verification, commissioning, parameter adjustment, and performance optimization according to design and debugging plans.- Ensure assembled equipment is properly installed as per design requirements and complies with mechanical and electrical inspection standards.- Conduct preliminary and detailed commissioning to verify equipment functions and performance meet specifications.- Identify issues during debugging, analyze root causes, and provide quick resolution or improvement suggestions.- Maintain 5S standards for debugging machines and surrounding work areas.- Work closely with mechanical, electrical, and software teams to ensure smooth commissioning and delivery of equipment.- Carry out Checklist document checks to ensure equipment meets design and usage requirements.- Assist in verification of control plans and support validation with process, quality, or customer teams.- Provide technical support, equipment setup, commissioning, and operator training at customer sites during business trips.- Collect equipment operation data and user feedback for performance analysis and improvement suggestions.- Handle customer technical inquiries during equipment usage.- Participate in continuous self-improvement, training programs, and cross-departmental support tasks as assigned.
Benefit
- Annual Leave starting from 10 days
- Phone allowance
- OT allowance
- Optical / Dental = RM300
- Medical = RM500
- Compassionate Leave
- Marriage Leave
- Travel AllowanceProcess Engineer (JB)ID:61103
4,000 MYR ~ 10,000 MYRJohor BahruJob Description
- Responsible for project debugging work, including equipment installation verification, commissioning, parameter adjustment, and performance optimization according to design and debugging plans.- Ensure assembled equipment is properly installed as per design requirements and complies with mechanical and electrical inspection standards.- Conduct preliminary and detailed commissioning to verify equipment functions and performance meet specifications.- Identify issues during debugging, analyze root causes, and provide quick resolution or improvement suggestions.- Maintain 5S standards for debugging machines and surrounding work areas.- Work closely with mechanical, electrical, and software teams to ensure smooth commissioning and delivery of equipment.- Carry out Checklist document checks to ensure equipment meets design and usage requirements.- Assist in verification of control plans and support validation with process, quality, or customer teams.- Provide technical support, equipment setup, commissioning, and operator training at customer sites during business trips.- Collect equipment operation data and user feedback for performance analysis and improvement suggestions.- Handle customer technical inquiries during equipment usage.- Participate in continuous self-improvement, training programs, and cross-departmental support tasks as assigned.
Benefit
- Annual Leave starting from 10 days
- Phone allowance
- OT allowance
- Optical / Dental = RM300
- Medical = RM500
- Compassionate Leave
- Marriage Leave
- Travel AllowanceElectrical Engineer (JB)ID:61101
5,000 MYR ~ 15,000 MYRSimpang Ampat, Johor BahruJob Description
Job Responsibilities:1. Lead electrical engineering tasks for projects.2. Evaluate, confirm, and execute the feasibility of electrical solutions.3. Conduct electrical design work, including BOMs, schematics, PLC & HMI programming, and operation/maintenance manuals.4. Provide on-site guidance for electrical installation, inspect construction quality, and oversee final acceptance.5. Perform electrical commissioning, including in-house testing and on-site support at customer locations (with travel requirements).6. Participate in and organize technical training to continuously enhance professional skills.7. Prepare technical training documentation.
Benefit
- Annual Leave starting from 10 days
- Phone allowance
- OT allowance
- Optical / Dental = RM300
- Medical = RM500
- Compassionate Leave
- Marriage Leave
- Travel AllowanceElectrical Engineer (PG)ID:61100
5,000 MYR ~ 15,000 MYRSimpang AmpatJob Description
Job Responsibilities:1. Lead electrical engineering tasks for projects.2. Evaluate, confirm, and execute the feasibility of electrical solutions.3. Conduct electrical design work, including BOMs, schematics, PLC & HMI programming, and operation/maintenance manuals.4. Provide on-site guidance for electrical installation, inspect construction quality, and oversee final acceptance.5. Perform electrical commissioning, including in-house testing and on-site support at customer locations (with travel requirements).6. Participate in and organize technical training to continuously enhance professional skills.7. Prepare technical training documentation.
Benefit
- Annual Leave starting from 10 days
- Phone allowance
- OT allowance
- Optical / Dental = RM300
- Medical = RM500
- Compassionate Leave
- Marriage Leave
- Travel Allowance