160 Jobs: Manufacturing(Electronics/Semiconductors)
Senior Analog Circuit Design Engineer (Clocking)ID:59653
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. The candidate should have specialized expertise in Clocking as described below. Seniority level to be determined by experience.Key Responsibilities• Design and debug PLL/DLL architectures and circuits (integer/fractional-N; analog or digital-assisted).• Oscillators: LC or ring-oscillator (RO) VCO/DCO, frequency synthesis, phase noise/jitter analysis and budgeting.• Delay lines, measurement/ruler circuitry, phase interpolators, and calibration/trim techniques.• DCC/DCM/DCA, clock tree/distribution, and clock management units; low-jitter clock generation and distribution networks.• Own end-to-end block/IP delivery: architecture studies, specification, transistor-level design, simulation, post-layout sign-off, and silicon bring-up/characterization.• Behavioral modeling (e.g., Verilog-A/SystemVerilog) to explore loop dynamics, spur/jitter mitigation and system interactions.• Build verification test benches; validate performance across PVT corners, mismatch/Monte Carlo (as applicable), and post-extraction parasitics.• Work closely with layout/mask designers: floorplanning guidance, layout reviews, and ensuring LVS/DRC clean implementation and parasitic awareness.• Meet quality and reliability requirements (e.g., EM/IR, aging/overstress); contribute to robust design methodology and sign-off checklists.• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Analog Circuit Design Engineer (High-Speed I/O)ID:59652
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. The candidate should have specialized expertise in High-Speed I/O as described below. Seniority level to be determined by experience.Key Responsibilities• Design TX/RX, analog front-end, serializers/deserializers, high-speed level shifters, predrivers/drivers, and termination/impedance calibration blocks.• Equalization: Feed-Forward Equalization (FFE), DFE, CTLE and related adaptation/control loops.• Clocking support for links (e.g., CDR interactions, low-jitter clock generation/distribution as needed by PHY).• SI analysis and creation/validation of IBIS/IBIS-AMI models; channel characterization (insertion loss, return loss, crosstalk) and eye diagram margin assessment.• Own end-to-end block/IP delivery: architecture studies, specification, transistor-level design, simulation, post-layout sign-off, and silicon bring-up/characterization.• Build verification test benches; validate performance across PVT corners, mismatch/Monte Carlo (as applicable), and post-extraction parasitics.• Work closely with layout/mask designers: floorplanning guidance, layout reviews, and ensuring LVS/DRC clean implementation and parasitic awareness.• Support interface integration and sign-off: PPA optimization, reliability checks (e.g., EM/IR, aging/overstress), and timing closure collaboration.• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Analog Circuit Design Engineer (Pure Analog)ID:59651
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. Seniority level to be determined by experience.Key Responsibilities• Reference generation: bandgap, bias circuits, reference voltages/currents; high-accuracy, low-noise design techniques.• Low offset / low-noise voltage regulators (LDO) and stability/compensation networks; PSRR and transient response optimization.• Voltage and power monitoring circuits: droop detection, voltage detectors, PowerGood and POR generation, analog sensing, and housekeeping blocks.• Power-management components, linear and/or switching-adjacent blocks, charge pumps, as applicable to the SoC/PHY environment.• Design/support ADC/DAC blocks and associated analog support circuits (sampling, references, amplifiers/comparators, clocking).• Voltage and temperature sensor design and characterization. Bandgap and PTAT-based temperature sensing; process corner detection circuits. Sensor readout, digitization, and calibration techniques.• Own end-to-end block/IP delivery: architecture studies, specification, transistor-level design, simulation, post-layout sign-off, and silicon bring-up/characterization.• Build verification test benches; validate performance across PVT corners, mismatch/Monte Carlo (as applicable), and post-extraction parasitics.• Work closely with layout/mask designers: floorplanning guidance, layout reviews, and ensuring LVS/DRC clean implementation and parasitic awareness.• Meet quality and reliability requirements (e.g., EM/IR, aging/overstress); contribute to robust design methodology and sign-off checklists.• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSales and Business Development Executive ID:59572
8,000 MYR ~ 9,000 MYRSungai BulohJob Description
• Responsible to achieve sales goals and target• Establishes new accounts and services accounts by identifying potential customers, planning and organizing sales call.• Negotiate sales prices and discounts in consultation with the manager and the tender team.• Meet with clients at appointments for sales presentations.• Establishing new, and maintaining existing, relationships with customers.• Collaborate with service team for product purpose. • Support finance team by following up sales collection.• Participates in business conferences, exhibitions, and marketing campaign
Benefit
Salary: ~RM8,000 - RM9,000
- AL: 20 days; SL: 14 days
- EPF & Socso
- Mileage claim 0.70 per km (own car)
- Medical insurance coverage
- Employee welfare: RM1,000 (including dental, optical, body checkup)Senior AI EngineerID:59158
20,000 MYR ~ 30,000 MYRKota Damansara/Petaling JayaJob Description
As a Senior AI Engineer, your responsibilities include, but are not limited to, leading the end-to-end development of AI-driven software products. This encompasses directing research activities, planning, and designing algorithms, executing development, analyzing medical images, managing, acquiring datasets, and creating test cases with corresponding samples. You will ensure the delivery of high-quality, efficient solutions, maintain compliance documentation, and implement optimization strategies to meet product quality requirements. In this role, you will mentor team members, facilitate problem-solving initiatives, and provide regular progress, challenge, and results reports to stakeholders and management, ensuring alignment with project milestones and strategic objectives.• Technical Lead – Research, plan and design algorithms, define architectures, and select frameworks for AI/ML projects, ensuring accuracy and efficiency according to test plan.• Data and Test – Direct data acquisition (including retrospective or collected datasets), direct labelling, data generating, and data preparation to meet quality, compliance, and ethical standards.• Development & Project Leadership – Oversee and review model designs, guide optimization for high-performance outcomes, and train team members in module development. Manage project timelines, allocate tasks in a clear manner, mentor junior engineers, and ensure deliverables align with strategic objectives.• Integration Oversight – Oversee deployment and integration of AI solutions into existing systems, ensuring stability and performance.• Documentation & Compliance – Maintain compliance documentation, prepare technical reports, and ensure audit-ready records in accordance with industry and regulatory standards.• Stakeholder Communication – Present progress, risks, and results in clear terms to management.• Innovation & IP Development – Investigate emerging AI methods and tools, identify opportunities for patents, and document innovations for future commercialization.• Research & Publication – Lead applied/fundamental scientific research paper and publish findings as in reputable conferences or journals to enhance company reputation.
Benefit
Salary range: ~RM20K - RM30K
- Annual Leave
- Medical Leave
- EPF
- SOCSO
- Performance Bonus (subject to personal performance)
- Salary increment (subject to yearly appraisal)
- Employee share (in discount price)
- Team gathering and activitiesCircuit Design Engineer (Senior/Staff/Principle)ID:59444
6,000 MYR ~ 30,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
Senior/Staff• Design and implement high speed interfaces and complex mixed-signal circuits using cutting-edge CMOS tech and EDA tools.• Design block IO blocks such as compensation circuit, reference voltage, transmitters and receivers.• Sub blocks include and not confined to , high speed serializers and deserializers, high speed levelshifters , predrivers , drivers , Feed Forward Equalization , DFE , CTLE.• Block to pass rigorous quality and reliability like EM-IR , Aging , Overstress• Run initial SI analysis and IBIS/IBIS-AMI creations.• Timing closure using Prime-Time or equivalent methods.• Work on serial and parallel interfaces.• Work closely with mask designers to deliver the physical design and assist with silicon evaluation.• Perform architecture studies, circuit designs & simulations, floor-planning, instructing mask designers, reliability verifications and silicon bring-up.Principle• Lead and manage team that design and implement high speed interfaces and complex mixed-signal circuits using cutting-edge CMOS tech and EDA tools.• Manage deliveries between function groups for example Layout, RTL , DV , Physical Design and SIPI/Package.• Harmonize schedule and end to end delivery.• Work closely with business development team to understand future projects and resource needed.• First line of clarification and explanation for customer related questions and support.• Work with post silicon team for design intent and required validations.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment【Japanese Speaker】Sales Manager (General Manager)ID:59396
10,000 MYR ~ 11,000 MYRBandar Sunway/PuchongJob Description
SummaryThe General Manager, Sales is responsible for driving business growth through management of existing Japanese clients while developing new business opportunities. This role also oversees sales strategy execution, cross-functional coordination, and sales team leadership.Key Responsibilities‐ Manage and grow relationships with existing customers, primarily Japanese companies- Identify and develop new customers and business opportunities- Oversee sales performance, order intake, and revenue management for assigned accounts- Handle customer inquiries related to procurement matters, including pricing, delivery schedules, and specifications- Coordinate closely with internal departments such as Production, Procurement, and Quality to meet customer requirements- Act as the first point of contact for quality-related issues and support improvement activities based on customer feedback- Develop and execute sales strategies and targets in alignment with company objectives- Lead, manage, and develop the sales team to improve performance and capabilities- Address customer complaints and issues, ensuring timely corrective and follow-up actions- Build and maintain strong relationships with customer management-level stakeholders
Benefit
- Bonus(Depend on the Performance)
- EPF, SOCSO provided
- AL :
< 2 years 8 days
> 2 years < 5 years 12 days
>5 years 16 days
MC : 14 days
- Transportation Allowance(RM200)
- Company CarAccounting / Finance Senior ExecutiveID:59382
3,500 MYR ~ 4,200 MYRKulimJob Description
Responsible for the full spectrum of accounting functions, including general ledger, fixed assets, and monthly closing, while guiding junior team members and liaising with external stakeholders.●Core Accounting: Ensure accuracy and timeliness in GL entries, fixed assets, AP, and monthly closing activities.●Asset Management: Handle asset numbering, transfers, and disposals.●Planning: Assist in monitoring and preparing budgeting and forecasting activities.●Cash Flow: Perform company cash flow management.●Inventory: Update and prepare monthly inventory data based on department inputs.●Liaison: Coordinate with internal/external auditors, tax agents, bankers, and government agencies.●Compliance: Maintain proper documentation, prepare statutory/quarterly reports, and stay updated on financial regulations.●Leadership: Handle and guide junior team members on AP, AR, and general accounting tasks.
Benefit
- EPF, SOCSO, EIS provided
- Bonus(1.5month - Depends on the Performance)
- Salary Increment(Once a year/around 3%)
- AL：
15 days (Less than 2 years),
17 days (More than 2 years, less than 5 years)
19 days (More than 5 years, less than 8 years)
20 days (More than 8 years, less than 10 years)
25 days (More than 10 years)
- MC：
14 days (Less than 2 years)
18 days (More than 2 years but less than 5 years)
22 days (More than 5 years)
- Transportation Allowance
- Mobile Phone allowance
- Medical Allowance
- InsuranceDesign Verification Engineer (Senior/Staff/Principal)ID:59121
10,000 MYR ~ 30,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a highly experienced and technically profound Design Verification Engineer. This role will be responsible for RTL verification, debug, functional coverage and SVA assertion development, UVM testbench development, testplan development and new verification methodology.Key Responsibilities- Develop and maintain UVM-based verification environments for IP designs.- Create detailed test plans based on design specifications, architectural documents, and use-case scenarios.- Implement constrained-random testbenches, scoreboards, and monitors to validate functional behavior.- Perform coverage-driven verification, including:a. Functional coverage (covergroups, coverpoints)b. Code coverage (statement, branch, toggle)c. Assertion coverage (SystemVerilog assertions)- Drive coverage closure by identifying gaps and enhancing test scenarios.- Execute gate-level simulations to validate timing, reset sequences, and power-up behavior post-synthesis.- Apply Formal Property Verification (FPV) to prove critical design properties and uncover corner-case bugs.- Debug simulation failures and collaborate with RTL designers to resolve issues efficiently.- Document verification results, coverage metrics, and regression summaries for traceability and quality assurance.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementCircuit Design Manager / Senior ManagerID:59119
15,000 MYR ~ 35,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
• Lead and manage team that design and implement high speed interfaces and complex mixed-signal circuits using cutting-edge CMOS tech and EDA tools.• Manage deliveries between function groups for example Layout, RTL , DV , Physical Design and SIPI/Package.• Harmonize schedule and end to end delivery• Work closely with business development team to understand future projects and resource needed• First line of clarification and explanation for customer related questions and support• Work with post silicon team for design intent and required validations
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment