78个职位: 峇六拜 Bayan Lepas最新招聘信息
Senior IT Specialist (Local Japanese Speaker)ID:60351
4,500 MYR ~ 6,500 MYRBayan Lepas工作内容
Job responsibilities: - Design, develop, test, and maintain in-house software development applications.- Troubleshoot, debug, and upgrade existing software.- Contribute to the continuous improvement of the software development process.- Prepare relevant system and user documentation.
福利制度
- AL: Starting from 10 days
- MC: Starting from 14 days
- Position allowance RM200
- Rental house allowance RM100
- Meal allowance (RM3 per working day)
- Transport allowance based on mileage
- Toll expenses claimable for mainland cdd
- OT claimable
- Company events
- Medical claimable: RM1000, family RM250
- Dental: RM250
- Yearly Increment
- Japanese Language allowance:
N1 RM 500 (Score: above 70%)
N1 RM 400 (Score: below 70%)
N2 RM300
N3 RM200
N4 RM100
N5 RM50Senior Sales ExecutiveID:60274
6,000 MYR ~ 7,000 MYRBayan Lepas工作内容
・Key Account Management (70-80% of workload): * Maintain and strengthen relationships with existing major clients, including leading global automotive-related companies and HDD manufacturers.・Conduct regular follow-ups to understand clients' production plans, technical needs, and future product development trends.・Meticulous Sales Administration: * Closely monitor and manage clients' sales forecasts, which is highly critical in the component manufacturing business.Oversee order statuses, revenue pipelines, and delivery schedules with high attention to detail and accuracy.・Internal & External Coordination: * Act as the primary window to capture client requests/technical feedback, coordinating efficiently with internal Sales Engineers and overseas manufacturing plants to ensure smooth delivery.・Business Development / New Projects:While strategic market screening and approaches to new potential clients are part of the long-term vision, this is NOT required immediately. The urgent priority is to stabilize existing accounts and relieve the Manager's operational load.
福利制度
Bonus: Approx. 3 months (Subject to company performance) / No commission scheme
Annual Leave : Up to 2 years: 11 days, 2-4 years: 12 days, 4-6 years: 16 days (MC follows regulations)
Car / Transportation Allowance: With own car: RM 400/month ／ Without car: RM 160/month
Medical Benefits: Medical Insurance up to RM 1,000/year (Includes health check-up), Dental up to RM 150/year
Travel Allowance: SGD 39/day for domestic business trips (Note: Travel frequency is very low)
Others: Company phone providedDFT Logic Design Engineer (Senior/Staff)ID:60263
8,000 MYR ~ 20,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
Job SummaryWe are seeking an experienced Senior/Staff DFT Logic Design Engineer to support the company's ASIC, SoC, and IP development initiatives in the area of Design for Testability (DFT). The engineer will be responsible for defining DFT architecture, implementing and verifying DFT features, integrating scan and BIST structures at the RTL level, and driving fault coverage from design through silicon bring-up. The role involves close collaboration with RTL, Verification, Physical Design, and Test Engineering teams to deliver high-quality DFT implementation for digital IP and ASIC products.Key Responsibilities1. DFT Architecture & Planning• Define and own the DFT architecture for digital IP and ASIC projects, including scan insertion strategy, compression ratios, JTAG/IEEE 1149.1 boundary scan, MBIST/LBIST planning, and DFT microarchitecture.• Document and maintain DFT specifications throughout the design cycle.• Lead the planning and execution of various DFT feature implementation and verification.2. DFT RTL Design & Integration• Develop and integrate DFT RTL (SystemVerilog/Verilog), including scan wrappers, scan controllers, BIST controllers, test access ports (TAP), and clock/reset control logic.• Implement Memory BIST logic insertion, integration, and verification for IP and ASIC projects.• Ensure DFT structures are synthesis-clean, timing-closed, and do not impact functional performance or power.3. Scan, ATPG & Verification• Implement scan architecture including scan chain stitching, scan controller generation, test compression, and scan timing closure.• Run ATPG to generate and validate stuck-at, transition, path-delay, and cell-aware fault pattern sets.• Perform gate-level simulation (GLS) to verify scan design.• Generate DFT collateral including MBIST patterns, ATPG patterns, scan constraints, timing constraints, BSDL files, and related documentation.• Achieve and sign off target fault coverage metrics.4. Design Quality & Validation• Collaborate with RTL designers to establish DFT-aware coding guidelines.• Perform DFT rule checking, CDC analysis, Lint, and static quality checks to identify and resolve testability violations early in the design cycle.• Support netlist validation through LEC and STA during implementation and timing closure.• Resolve DFT-related ECOs prior to tape-out.5. JTAG & Boundary Scan• Design and verify TAP controllers.• Implement and verify JTAG/Boundary Scan architecture at IP and SoC level.• Generate BSDL files and support Boundary Scan verification.6. Post-Silicon & Manufacturing Support• Support post-silicon validation, silicon power-on, ATE bring-up, and high-volume manufacturing testing.• Work with test engineers to debug ATPG patterns, analyze yield data, and identify root causes related to RTL or physical design issues.• Support test pattern bring-up and production test activities.
福利制度
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Production PlannerID:60247
4,000 MYR ~ 8,000 MYRBayan Lepas工作内容
• Develop and maintain detailed production schedules, ensuring the timely completion of orders. • Coordinate production timelines with other departments (e.g., procurement, sales, inventory) to ensure alignment with business goals. • Adjust schedules as needed to account for changes in demand, supply chain issues, or production delays.• Oversee the review of production output to ensure it meets the required specifications.• Lead and manage the production planning team, providing guidance and training as needed.• Oversee team members’ performance and provide constructive feedback to ensure optimal productivity and quality.• Ensure a collaborative and efficient work environment, fostering continuous improvement.• Ensure that necessary materials, equipment, and labor are available for production as scheduled.• Collaborate with inventory and procurement teams to ensure materials are available on time and at the required quantities.• Address any shortages or delays in materials or resources that could impact production schedules.• Monitor inventory levels to ensure they meet production needs while minimizing excess stock.• Work with the inventory team to manage raw materials and finished goods effectively.• Implement systems to track and manage materials, reducing waste and excess.• Track production performance metrics (e.g., efficiency, downtime, throughput) and report findings to management.• Analyze production data to identify bottlenecks or inefficiencies and recommend improvements.• Provide regular updates on production status, potential risks, and progress towards goals. • Identify opportunities for process improvements within production planning and scheduling.• Work closely with cross-functional teams to implement lean manufacturing techniques and process optimization strategies.• Lead efforts to enhance the overall efficiency and effectiveness of production planning.• Any ad-hoc tasks as per assigned by manager.
福利制度
Salary: RM4,000 - RM8,000
AL: Starting from 14 days
MC: 14 / 18 / 22 days
<Other benefits>
• Meal subsidy
• Fixed allowances: Phone, transport
• After confirmation: Medical insurance, health screening, dental/optical (They will share more during interview session)Sales ExecutiveID:60244
3,450 MYR ~ 5,500 MYRBayan Lepas工作内容
Responsible for driving sales and supporting customer relationships, including understanding customer needs, preparing quotations, and ensuring smooth sales operations. Supports management through reporting and handling customer-related issues.Key Responsibilities:- Understand customer requirements and provide sales support, including quotations and product promotion.- Prepare sales forecasts and monitor sales activities to inform management decisions.- Manage customer relationships by handling complaints, resolving disputes, and negotiating when necessary.- Conduct debt collection and ensure sales are maintained according to plans.- Respond to and follow up on inquiries via telephone, email, or in-person, and perform ad-hoc tasks assigned by management.
福利制度
- AL: starting from 12 days
- MC: starting from 14 days
- Fixed Transport allowance: RM300
- Fixed HP allowance: RM150
- Bonus subject to Company performance
- Medical Insurance (Group Personal Accident, Hospital & Surgical Insurance)【Fresh Grads Ok!】 Quality EngineerID:60220
5,000 MYR ~ 8,000 MYRBayan Lepas工作内容
This role is responsible for ensuring product quality through inspections, issue resolution, corrective actions, and continuous improvement across manufacturing processes.• Responsible for quality management, quality inspection and quality control during the manufacturing process.• Propose and implement corrective and preventative actions and track their effectiveness shall potential issue arise.• Assist in quality analysis of product quality issues, execute and implement quality improvement plans, track quality improvement plans, track quality improvements and ensure the final resolution of quality issues.• Summarize and analyze various quality data and push responsible departments to resolve issues promptly.• Handle customer complaints, drive improvements and track the effectiveness of corrective actions.• Collaborate with project and technical personnel on new product pilot runs and quality control.• Any ad-hoc tasks as per assigned by manager.
福利制度
Salary: RM5,000 - RM8,000
AL: Starting from 14 days
MC: 14 / 18 / 22 days
<Other benefits>
• Meal subsidy
• Fixed allowances: Phone, transport
• After confirmation: Medical insurance, health screening, dental/optical (They will share more during interview session)Physical Design Lead EngineerID:60207
10,000 MYR ~ 20,000 MYRBayan Lepas, Bayan Baru工作内容
We are seeking a Physical Design Lead to own and drive the end-to-end physical implementation of testchips and high-speed interface subsystems such as DDR/LPDDR PHY, HBM PHY, and UCIe from netlist through tape-out-ready GDSII on leading-edge process nodes. This is a technical lead role: candidate is expected to take full ownership of implementation scope, mentor junior PD engineers, define methodology, and drive cross-functional coordination with RTL design, DFT, analog/custom layout, and verification teams. Seniority level to be determined by experience.Key Responsibilities• Own end-to-end physical implementation of assigned testchip or high-speed interface subsystem (DDR/LPDDR, HBM, UCIe, or equivalent): floorplanning, power grid design, placement, clock tree synthesis (CTS), routing, and chip finishing through to GDSII stream-out.• Coordinate timing closure across all functional modes and PVT corners with the dedicated full-chip STA owner; provide timing-aware physical implementation decisions, flag routing and placement contributors to timing degradation, and execute physical ECOs as directed.• Lead chip-level or subsystem-level floorplan definition: partition boundaries, I/O ring assembly, hard IP (PHY, memory, custom analog) placement, power domain planning, and bump/pad assignment; balance area, routability, and signal-integrity constraints.• Define and enforce the physical design methodology and flow for the team: synthesis-to-P&R handoff conventions, ECO management, signoff checklists, and documentation standards; develop and maintain flow automation scripts for regression, reporting, and incremental ECO runs.• Drive power integrity sign-off: static and dynamic IR-drop analysis (Redhawk/Voltus or equivalent), EM rule compliance, power strapping strategy, and decap insertion; collaborate with circuit and layout teams to resolve violations.• Coordinate physical verification closure (DRC/LVS/ERC/Antenna) using Calibre or equivalent, including custom analog and mixed-signal IP integration; manage foundry rule deck updates and waiver documentation.• Interface with RTL designers, DFT engineers, and analog/custom layout engineers to align on design constraints, resolve integration issues, and ensure clean handoff at each project milestone; represent physical design in architecture and tapeout readiness reviews.• Mentor and technically guide junior and mid-level physical design engineers; review their floorplans and closure strategies; provide actionable feedback and escalate risks proactively to the program lead.
福利制度
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Planning Executive (Contract)ID:60199
5,000 MYR ~ 7,000 MYRBayan Lepas工作内容
- Plan, administer and coordinate when receive new orders.- Oversee company vision inclusive of specific Key Performance Indicators (KPI) on quality, production, on time delivery, customers’ satisfaction, continuous improvement and profitability.- Participate in decision making of Master Production Schedule (MPS) loading through proper materials’ sizing.- Analyze, maintain, and execute Materials Requirement Plan (MRP).- Continuously monitor and verify the material pipeline to ensure MRP requirements are met.- Run daily systems reports to determine material shortages that need to be expedited.- Follow-up with appropriate Buyer to ensure materials are available to support Manufacturing use per load plan.- Performs material and capacity analysis in establishing a production schedule for each order, and communicates/resolves related issues.- Analyze potential impact of forecast and production schedule changes on component procurement and production volume.- Ensure materials availability to support production per the MPS through MRP execution, on-time delivery, and coordination of materials movement through receiving to Manufacturing.- Ensure all customers’ Engineering Change Notices (ECN) are implemented in a timely manner.- Monitors material status on upcoming orders and flags and release orders as daily release schedule is defined.- Identify and appropriately address materials supply issues.- Plan and schedule for each Work Order/Job Traveller according to customers’ demand.- Provide Month End Closing Stock to Finance Department.- Work closely with Manufacturing Supervisor and Manufacturing Manager to meet customers’ satisfaction and requirements.- Assist Planning Manager in planning and control production to meet customers’ requirements.
福利制度
- Transport allowance
- Medical Claim
- Optical/ Dental Claim
- Annual Leave – 14 days
- Life insurance and HospitalizationLogic Design Engineer / RTL Design Engineer (Senior/Staff/Principal)ID:60086
8,000 MYR ~ 35,000 MYRBayan Lepas, Bayan Baru工作内容
Job SummaryThe Logic Design Engineer will be responsible for the architecture, design, implementation, and delivery of high-performance digital IPs and subsystems for ASIC/SoC products. The role involves microarchitecture definition, RTL development, functional validation support, timing convergence, and IP release activities while collaborating closely with architecture, verification, physical design, firmware, and system teams to achieve performance, power, area (PPA), and quality targets.The engineer will take ownership of IP or subsystem-level RTL implementation from specification through customer release and contribute to design quality through lint, CDC, formal verification, timing closure, and design reviews.Key Responsibilities1. RTL Design & Microarchitecture• Define and implement block-level or subsystem-level RTL architecture based on product specifications.• Develop high-quality RTL using Verilog/SystemVerilog for ASIC/SoC products.• Participate in microarchitecture definition and document design decisions.• Ensure RTL complies with coding standards, synthesis guidelines, and design methodologies.• Review RTL implementation and participate in peer design reviews.2. Digital IP Development• Own assigned digital IPs or logic blocks from specification through implementation and release.• Design high-speed digital logic capable of achieving timing closure on advanced process nodes.• Collaborate with architects, firmware, and system engineers to ensure correct feature implementation.• Support IP integration into subsystem or SoC environments.3. Design Quality & Verification Support• Produce functional test plans covering design requirements.• Support Design Verification teams in debugging simulation failures and functional issues.• Perform and resolve: Lint, CDC/RDC, Formal Equivalence Verification (FEV), Low Power (UPF/CPF)• Participate in coverage closure and verification reviews.4. Timing & Design Closure• Work closely with Physical Design and STA teams to achieve timing closure.• Support synthesis, timing optimization, clock-domain crossing, and low-power implementation.• Develop and validate timing constraints (SDC) and power intent where applicable.• Resolve setup/hold timing issues and support floorplan optimization.5. IP Release & Documentation• Own IP release deliverables including RTL packages, documentation, and quality sign-off.• Prepare design documentation, architecture specifications, and implementation reports.• Ensure all deliverables meet internal quality standards and customer requirements.6. Cross-functional Collaboration• Work closely with Architecture, DV, Physical Design, Firmware, Validation, and System Engineering teams.• Participate in design reviews, technical discussions, and project planning.• Contribute to continuous improvement of RTL design methodology and automation flows.
福利制度
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Test Operations Engineer ID:60157
6,417 MYR ~ 9,167 MYRBayan Lepas工作内容
【Job description】This position is expected to provide Test Operations and Engineering support for products post manufacturing release and deliver operational excellence through cost reductions, OEE, yield and cycle time improvements to achieve our test KPI goals with our Test Manufacturing Sites (Internal and Outsourcing Suppliers) in Malaysia, Thailand, Singapore and across Asia (Taiwan, China, Korea). This position reports into Operations Engineering Department (OED).【Key Responsibilities】- Responsible for Test Operations interface to Renesas Product Groups and other functional teams (Supply Chain, Quality, Packaging, Foundry, PMO) across US, Japan, India, Malaysia, and China on all phases of product lifecycle- Execute daily test operations activities with internal factories and test OSATs to ensure customer delivery fulfillment (i.e. Lot tracking and dispositions, Test Program releases, Hardware Troubleshooting/Repairs, Equipment up-time, Tester Utilization OEE tracking, Continuous Improvement Process, etc)- Coordinate Probe/Final Test transfer from New Product Introduction to High Volume Manufacturing from Renesas Product Group groups- Execute new test capacity expansions (tester/ handler/ hardware) to ensure sufficient capacity and meet production demand- Deployment of new tester/handler technology and test solutions to test manufacturing sites from test development- Implement best known practices and process within test manufacturing sites- Drive Gross Margins (OEE, Yield, Retest) improvement initiatives
福利制度
Annual Salary Range ::RM77000-RM110000
(Monthly: RM6,417-RM9,167)
*Regarding the employee benefits, please check them directly with the company during your interview.