32 Jobs: Job Vacancies for Other(Mechanical) Engineer Positions
Senior Automation Engineering Manager (PG)ID:59884
15,000 MYR ~ 20,000 MYRSimpang Ampat, Batu KawanJob Description
Job SummaryThe Senior Automation Engineering Manager leads the Automation Engineering department, overseeing daily operations, budget and manpower planning, project execution, and team development. The role ensures compliance with OSHA and GMP standards, drives continuous improvement initiatives, and manages customer and internal coordination to define project requirements and SOW, while ensuring timely delivery of automation design projects.Job Responsibilities- Responsible for the daily management of the Automation engineering department, developing department budget and manpower plans.- Implement department's workflow and system, etc.- Lead initiatives, such as Kaizen events and 5S workplace organization, to eliminate waste and improve efficiency.- Conduct training and development for team members followed by certification to enhance the overall skills of the team.- Interface with customers to understand and interpret Project requirements, then work with customers and internal team to finalize SOW.- Be aware of Safety & Compliance: Enforce OSHA and GMP (Good Manufacturing Practices) standards to maintain a zero-incident culture and ensure product regulatory compliance.- Key Performance Indicators (Automation design KPIs).- Train and certify all engineers as per agreed to plan with CTO.- On-Time In-Full (OTIF): Rate of design projects delivered on the promised date and budget.- Finish project design activities within agreed to timeline and budget.- Project DFM generation and documentation.- Carry out detailed design reviews (3D/2D/BOM).- Review and approve the operation and maintenance manual of the equipment.- Provide technical support related to the equipment.- Manage & organize and file project materials.- Align with company objectives and follow the work arrangements.- Take work seriously and with full responsibility.- Be determined to challenge oneself and figure out work efficiency improvement options.- Help CTO develop Technology roadmap.
Benefit
- Phone allowance
- Optical / Dental = RM300
- Medical = RM500
- Annual Leave
- Compassionate Leave
- Marriage Leave
- Travel AllowanceMechanical Design Engineer (JB)ID:59340
5,000 MYR ~ 7,000 MYRJohor BahruJob Description
The Mechanical Design Engineer will be responsible for design and development of automation machines and assembly lines, ensuring efficient and reliable system performance. The role requires experience in designing jigs and fixtures, pallet and carrier systems, material handling solutions, and other automation equipment, with a strong emphasis on developing innovative, efficient, and reliable automation systems.• Collaborate with business unit for DFM preparation to secure potential projects.• Coordinate with cross-functional internal teams to support design and development of automation equipment.• Design and develop Jig & Fixture, Pallet & Carrier, Material Handling System, Application Module solutions based on requirements.• Generate and manage 2D drawings, engineering documents and BOM lists.• Experienced in project management and job coordination.• Troubleshoot machine performance issues, identifying and implementing necessary improvements.• Prepare comprehensive documentation, including user manuals, FAT and SAT requirements.• Coordinate with internal stakeholders, such as electrical, software and production teams to ensure high-quality project execution.• Undertake other duties as assigned by management.
Benefit
- Phone allowance
- OT allowance
- Optical / Dental = RM300
- Medical = RM500
- Annual Leave
- Compassionate Leave
- Marriage Leave
- Travel AllowanceSenior/Staff Digital Design EngineerID:59719
20,000 MYR ~ 25,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
This role will be responsible for architecting, designing, and verifying complex digital IPs and subsystems for SoCs or ASIC/FPGA-based products. As a senior role, it requires to work closely with system architects, verification, and physical design teams to deliver high-performance, power-efficient, and functionally correct RTL implementations. Overall, the responsibilities cover wider scope encompassing from IP to subsystem level and SOC level global issues.Key ResponsibilitiesArchitect with system engineers to perform:-• Define IP specifications, architecture & test concept.• Specify correct implementation of RTL design and verify digital circuits to deliver high performance, low power, and efficient implementation.• Conduct design reviews and support in documentation.• Support verification engineer to define verification test items.• Support in the roadmap formulation for the sensor IPs.• Support view generation engineers to verify the correctness of the Ips views.
Benefit
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementProposal EngineerID:59467
4,000 MYR ~ 6,000 MYRBatu KawanJob Description
1. Technical Estimation & CostingAnalyze customer-provided drawings (2D/3D CAD) to calculate required materials, machining processes, and labor hours.Determine the most competitive yet profitable pricing by understanding precision machining and sheet metal fabrication processes.2. Preparation of Technical ProposalsPropose optimal solutions using the company’s machining and automation technologies to address customer challenges, such as precision enhancement, cost reduction, or lead-time optimization.Develop specifications for customized jigs, fixtures, and automated equipment, in addition to standard products like wire shelving.3. Liaison with Customers and Internal DepartmentsCustomer Facing: Accompany the Sales team to provide technical explanations and finalize detailed specifications with clients.Internal Coordination: Conduct handover meetings with the Production and Design departments upon project award to ensure a seamless transition to manufacturing.4. Vendor & Supplier ManagementRequest quotations from external vendors for processes or material procurement that cannot be handled in-house and perform cost-benefit analysis.
Benefit
- Salary RM 4,000- RM 6,000 (depend on Experience)
- Work Time: 8:00AM to 6:00PM (Mon to Fri)
- Work Location； Batu Kawan
- AL: 10 days
- MC: 14days
- EPF,SOCSO,EIS
- Medical Allowance：RM500/year
- Commuting expenses covered：Mileage claim RM0.50/km (car), RM0.20/km (motor)
- OT fixed rate RM12/hour (basic salary > RM4k)Tool Maker (Stamping)ID:59553
3,000 MYR ~ 4,500 MYRBukit MinyakJob Description
- Maintaining stamping dies in good productive condition.- Analyze problem and repair tooling for corrective action.- Make improvement and propose corrective and preventive action.- Understand and read engineering drawing.- Setup and follow-up on die setup and minor trouble-shooting on press machine.- Assemble new tooling and modification / upgrading.- Operate surface grinding machine for fabrication, resurface and modification.- Completes routine die report for traceability / improvements and communicates effectively through detail information.- Control spare part inventory.- Conduct test runs with completed tools or dies to ensure that parts meet specifications; make adjustments as necessary.- File, grind, shim, and adjust different parts to properly fit them together.- Fit and assemble parts to make, repair, or modify dies, jigs, gauges, and tools, using machine tools and hand tools.- Inspect finished dies for smoothness, contour conformity, and defects.- Lift, position, and secure machined parts on surface plates or worktables, using hoists, vises, v-blocks, or angle plates.- Set up and operate conventional or computer numerically controlled machine tools such as lathes, milling machines, and grinders to cut, bore, grind, or otherwise shape parts to prescribed dimensions and finishes.- Smooth and polish flat and contoured surfaces of parts or tools, using scrapers, abrasive stones, files, emery cloths, or power grinders.- Verify dimensions, alignments, and clearances of finished parts for conformance to specifications, using measuring instruments such as calipers, gauge blocks, micrometers, and dial indicators.- To handle other tasks and duties as and when requested by superior.
Benefit
- AL: 12 days, increase gradually based on company policy.
- Individual Insurance
- Medical RM200/year & Dental RM300/year
- Toll claimable (Candidate from Island only)
- Mobile allowances (Depend)
- Individual bonus - 1month fixed
- Increment every year (July) -Rate based on performanceSenior/Staff/Principal Engineer, Circuit DesignID:59444
6,500 MYR ~ 8,500 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
• Design and implement high speed interfaces and complex mixed-signal circuits using cutting-edge CMOS tech and EDA tools.• Design block IO blocks such as compensation circuit, reference voltage, transmitters and receivers.• Sub blocks include and not confined to , high speed serializers and deserializers, high speed levelshifters , predrivers , drivers , Feed Forward Equalization , DFE , CTLE.• Block to pass rigorous quality and reliability like EM-IR , Aging , Overstress• Run initial SI analysis and IBIS/IBIS-AMI creations.• Timing closure using Prime-Time or equivalent methods.• Work on serial and parallel interfaces.• Work closely with mask designers to deliver the physical design and assist with silicon evaluation.• Perform architecture studies, circuit designs & simulations, floor-planning, instructing mask designers, reliability verifications and silicon bring-up.
Benefit
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementNoC Senior Design EngineerID:59416
8,000 MYR ~ 15,000 MYRBayan Lepas, Bayan BaruJob Description
Role Overview We are seeking Senior Design Engineer specializing in Network-on-Chip (NoC) to join our cutting-edge semiconductor team. This role involves architecting, designing, and optimizing NoC interconnect solutions for high-performance chips. You will work closely with architects, verification engineers, and software teams to deliver scalable, efficient, and low-latency interconnect designs. Job Description: • NoC Architecture/Micro-architect & Design: Develop and optimize high-performance, scalable, and low-latency NoC solutions for SoCs and multi-core processors. • Performance Analysis: Conduct traffic modeling, simulation, and bottleneck analysis to optimize NoC throughput and latency. • Verification & Validation: Collaborate with verification teams to develop testbenches, ensure functional correctness, and debug issues. • Power & Area Optimization: Optimize NoC designs for low-power and area-efficient implementations, working closely with physical design teams. • Integration & Customization: Work on custom NoC configurations, integrating third-party IPs, and tailoring interconnect solutions for specific applications. • Tool & Flow Development: Enhance NoC design methodologies by developing scripts, automation flows, and performance monitoring tools. • Cross-functional Collaboration: Work with chip architects, backend engineers, and software teams to define NoC requirements and optimize for real-world workloads.
Benefit
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior RTL Design EngineerID:59415
10,000 MYR ~ 20,000 MYRBayan Lepas, Bayan BaruJob Description
Role DescriptionThis is a full-time on-site role based in Penang for a Senior RTL Design Engineer specializing in Memory PHY and Controller IP.. The engineer will take ownership of logic sub-blocks within the PHY, contributing to RTL implementation, functional verification, and timing/power constraint definition. The role requires close collaboration with design verification (DV), firmware, and physical design teams to ensure high-quality, high-speed RTL that meets power, performance, and area (PPA) goals.The candidate should have a strong foundation in RTL design, timing analysis, and design methodology best practices, and be capable of driving design closure through disciplined debugging, scripting, and continuous flow improvements.Key Responsibilities1. Block Ownership and RTL Design Implementation• Take ownership of assigned logic sub-blocks within the Memory PHY or Controller IP.• Contribute to RTL design, code review, and integration in collaboration with PHY and full-chip design teams.• Ensure compliance with architecture specifications and coding guidelines.• Understand PHY–Firmware interaction for training, calibration, and initialization sequences.• Develop local testbenches to functionally verify assigned PHY sub-blocks.• Collaborate with DV engineers to debug simulation failures, analyze waveforms, and identify root causes for corner-case issues.2. Behavioral Modeling and Verification Support• Develop and maintain behavioral models for PHY sub-blocks.• Ensure equivalence between behavioral models and schematics through established equivalence-check (LEC/FEV) flows.• Provide model updates to align with design and architectural changes.3. Constraint and Power Intent Definition• Participate in the creation and validation of SDC (timing) and UPF (power intent) files for sub-blocks and/or the top-level PHY.• Validate constraint correctness and ensure smooth handoff to STA and physical design teams.4. Static Verification (Lint / CDC / RDC)• Run Lint, CDC, and RDC checks for sub-blocks and top-level PHY.• Review and debug violations, provide waivers with technical justification.• Support and guide the design team in interpreting and resolving RDC-related issues.5. Code Coverage and Waivers• Support DV team in achieving code coverage closure, reviewing unhit regions, suggesting test scenarios, and writing justified waivers.• Participate in coverage reviews and track closure progress toward sign-off.
Benefit
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementStaff/Senior Staff/Principal Design Verification Engineer (DV)ID:59121
10,000 MYR ~ 30,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a highly experienced and technically profound Staff Design Verification Engineer to take on a technical leadership role in pre-silicon verification for complex, next-generation Application-Specific Integrated Circuits (ASICs). This role is critical in driving verification excellence, setting technical direction, and mentoring local talent.Key Responsibilities• Verification Strategy & Ownership: Define, implement, and lead the overall verification strategy and test plan development (including functional, coverage, and performance) for complex digital ASIC blocks or full chips, ensuring robust quality before tape-out.• Advanced UVM Testbench: Architect, develop, and maintain advanced, reusable UVM-based verification environments using SystemVerilog to enable constrained-random and coverage-driven verification.• C/C++ Programming: Develop C/C++ test cases, firmware test cases for efficient hardware/software co-verification via DPI-C.• Execution and Triage: Hands-on execution of the verification plan, including test case development, regression management, triage, and expert root-cause analysis of functional bugs in RTL and gate-level simulations.• Coverage and Sign-off: Drive and achieve comprehensive functional and code coverage closure goals, utilizing advanced techniques, writing complex assertions (SVA), and ensuring formal verification compliance.• Technical Mentorship: Act as a subject matter expert and mentor to junior and intermediate verification engineers, fostering best practices in coding, methodology, and debug techniques across the team.• Flow Improvement: Evaluate, select, and develop new verification methodologies, tools, and flows (e.g., formal verification, emulation) to enhance the overall team's productivity and quality.
Benefit
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementPrincipal Engineer/Principal Architect (Design Verification)ID:59120
20,000 MYR ~ 30,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking an experienced and visionary Principal Engineer/Architect (Design Verification) to lead and drive next-generation design verification strategies, methodologies and execution. The ideal candidate will play a key technical role in shaping DV architecture, methodologies, and execution frameworks to ensure world-class product quality and verification efficiency.Join us if you are a passionate and forward-thinking verification leader who thrives in a fast-paced, innovation-driven semiconductor environment and enjoys mentoring teams, solving complex verification challenges, and influencing design quality and other global engineering teams.Key Responsibilities1. DV Architecture and Methodology Leadership• Define and drive scalable, reusable, and high-efficiency DV architecture and methodology.• Establish verification best practices, including testbench architecture, constrained-random verification, coverage-driven methodologies, and formal verification integration.• Champion automation, regression management, and coverage closure frameworks for continuous efficiency improvement.2. Technical Strategy and Execution• Define verification strategies and verification plans for complex IP design verification (NOC, memory, etc.).• Evaluate and implement state-of-the-art tools, verification techniques, and verification accelerators.• Drive sign-off criteria definition, including functional and code coverage, assertions, and quality metrics.3. Cross-Functional Team Collaboration• Collaborate closely with architecture, design, software teams to ensure robust verification plans and alignment on design intent.• Provide technical guidance to local and global DV teams to standardize and scale best practices.4. Leadership and Mentoring• Mentor and develop technical talent within the DV team, promoting innovation and continuous learning.• Conduct technical reviews, training, and methodology adoption sessions.• Act as a key technical interface with stakeholders and management on DV efficiency and quality metrics.
Benefit
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment
