34个职位: 峇六拜 Bayan Lepas最新招聘信息
Manufacturing/Service Engineer (RF) ID:58390
10,000 MYR ~ 12,000 MYRBayan Lepas工作内容
• On-Site Support & Maintenance:- Perform daily maintenance, troubleshooting, and rapid resolution of issues related to RF test systems to maximize production line availability.- Communicate closely with the factory’s production, test, and quality teams to address test-related issues in a timely manner.- Support product introduction by deploying, installing, integrating, and validating RF test systems (including test instruments, switching systems, and software) at the factory site.- Implement upgrades and modifications to existing test systems based on engineering change requests. • Test line Setup & Optimization:- Develop, debug, and maintain automation machine.- Continuously optimize test procedures and algorithms to improve test efficiency (UPH), reduce costs, and enhance test coverage and accuracy.- Collect and analyze production test data to identify trends and anomalies.- Prepare daily/weekly reports and provide data-driven insights for product and process improvement.- Assist the client in yield analysis and improvement by identifying root causes of test failures.- Train the operators and technicians on system operation and basic maintenance.- Create and update technical documentation, including system configuration manuals, maintenance guides, and troubleshooting procedures.
福利制度
Salary: RM10,000 - RM12,000
AL: Starting from 14 days
MC: 14 / 18 / 22 days
<Other benefits>
• Meal subsidy
• Fixed allowances: Phone, transport
• After confirmation: Medical insurance, health screening, dental/optical (They will share more during interview session)Senior Staff IP Logic Design / MicroarchitectID:58605
15,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
The Senior IP Logic Design Engineer will be responsible for the design and implementation of logic design, microarchitecture definition, RTL coding, IP releases, high speed timing convergence, and collaboration with cross-functional teams to meet project specifications. Tasks also include performance optimization and ensuring design functionality through verification and validation processes.Key Responsibilities:1. IP Design Responsibility• Define and design Unit Level / Layer Level IP Design that able to converge timing at high end process node, with high frequency requirements.• Ability to drive a low power and complex design to completions.2. IP Quality Responsibility• Ability to orchestrate the team on validation requirements to catch all possible boundary conditions of logic bugs.3. IP Releases• Deep knowledge on Lint and CDC flow and ability to drive the Lint and CDC convergence.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Staff IP Logic Design / MicroarchitectID:58607
8,000 MYR ~ 15,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
The Senior IP Logic Design Engineer will be responsible for the design and implementation of logic design, microarchitecture definition, RTL coding, IP releases, high speed timing convergence, and collaboration with cross-functional teams to meet project specifications. Tasks also functional validation through black box and white box validation, FPV validation, functional validation as well as emulations.Key Responsibilities:1. IP Design Responsibility• Define and design Unit Level / Layer Level IP Design that able to converge timing at high end process node, with high frequency requirements.• Ability to produce testplans to cover design requirement2. IP Quality Responsibility• Ability to execute design validations, FPV, lintra, CDC and etc tools3. IP Releases• Owning the IP Releases for customer release depending on the assignment
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementIP Logic Design Principle EngineerID:58602
20,000 MYR ~ 30,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
The IP Logic Design Principle Engineer will be responsible for architecting microarchitecture design implementation of an IP, spanning across all IP stack such as application layer, transaction layer, link layer, die to die layer, physical layer. Ability to code verilog / system verilog RTL for complex IP, review RTL coding, orchestra IP development phase for projects from beginning to completion. This includes the ability to technically drive the IP team on Design / Validation in completing technical tasks up to IP releases for customers. Candidate must be also capable of solving high speed timing convergence on various processes and collaborate with cross-functional teams to meet project specifications. The role will drive performance optimization and ensuring design functionality through verification and validation processes.Key Responsibilities:1. IP Microarchitecture Definitions• Define microarchitecture definition across layers and define a clean inter unit partition requirements.• Drive design team to deliver best-in-class IP design that optimizes for area, latency, power and performance.• Ability to distribute and drive the design team to implement high quality design and meeting time to market requirements.2. IP Design Responsibility• Implement very complicated high-speed design which can converge timing convergence at high frequency.• Capable of orchestrating the team on right directions of timing convergence, CDC, lintra and etc. for tools closure.3. IP Quality Responsibility• Review IP design and validation testplan to make sure IP Design is at top notch quality.4. IP Releases• Deep knowledge on Lint and CDC flow and ability to drive the Lint and CDC convergence.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementIP Engineering DirectorID:58600
25,000 MYR ~ 40,000 MYRBayan Lepas, Bayan Baru工作内容
Highly skilled and visionary IP Engineering Director, to lead the development and delivery of reusable semiconductor IP that powers advanced SoCs, chiplets, and multi-die solutions. This role requires deep expertise in semiconductor IP design, verification, and integration, combined with proven leadership in building and managing engineering teams. While the position is primarily focused on hardware IP development (digital, analog, or mixed-signal), software development experience—such as firmware, device drivers, or modeling frameworks—is a strong plus, enabling HW/SW co-design, system-level optimization, and accelerated customer adoption. The IP Engineering Director will define technical roadmaps, oversee execution, and collaborate with cross-functional teams to deliver silicon-proven IP solutions that meet aggressive power, performance, and area (PPA) targets.Key Responsibilities1. Leadership & Strategy• Define and execute the company’s IP engineering roadmap aligned with product strategy.• Build and lead a world-class IP engineering team across design, verification, validation, and integration.• Mentor and develop engineering leaders, fostering innovation, collaboration, and technical excellence.• Drive continuous improvement in design methodology, automation, and productivity.2. IP Development & Execution• Lead architecture, micro-architecture, and RTL design of reusable IP (e.g., memory interfaces, high-speed I/Os, interconnects, SerDes, or accelerators).• Oversee verification, validation, and sign-off, ensuring robust, silicon-proven IP delivery.• Collaborate with SoC, package, and system teams for seamless integration into chiplet and multi-die systems.• Support post-silicon debug, bring-up, and customer deployment of IP blocks.3. Cross-Functional Collaboration• Partner with software teams on firmware, drivers, and simulation frameworks to ensure full-stack enablement.• Engage with product, SoC, and system architects to align IP functionality with end-market requirements.• Collaborate with foundries, EDA vendors, and ecosystem partners to enhance IP design flows and deployment.4. Program Management & Delivery• Own IP program planning, milestones, schedules, and risk management.• Ensure timely delivery of high-quality IP to internal design teams and external customers.• Drive design reuse and scalability across multiple projects and product lines.5. Execution & Delivery• Own NoC project planning, execution, and delivery, ensuring schedule adherence and quality.• Establish and improve design methodologies, verification flows, and automation for rapid, reliable development.• Support bring-up, debug, and performance validation in both pre-silicon and post-silicon environments.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementNetwork-on-Chip (NoC) Team Engineering DirectorID:58599
25,000 MYR ~ 40,000 MYRBayan Lepas, Bayan Baru工作内容
This role will lead the architecture, design, and development of high-performance interconnect solutions for SoCs, chiplets, and advanced packaging systems. The ideal candidate will have deep expertise in NoC architecture, RTL/micro-architecture design, performance modeling, and verification, combined with strong leadership skills. Experience in both hardware and software development is a strong plus, as it enables system-level optimization, modeling, and seamless HW/SW co-design for next-generation NoC solutions. The NoC Team Director will drive technical strategy, manage execution, mentor a multidisciplinary team, and collaborate with cross-functional partners to deliver state-of-the-art interconnect IP for data-intensive and AI-driven applications. Key Responsibilities1. Leadership & Strategy• Define and execute the company’s NoC technology roadmap, aligned with product and system- level requirements.• Build, mentor, and lead a high-performing team of architects, designers, verification engineers, and performance modelers.• Foster innovation in NoC design, methodology, and automation to achieve best-in-class power, performance, and area (PPA).2. NoC Architecture & Design• Lead the design of scalable, configurable, and high-bandwidth NoC architectures for heterogeneous SoCs and multi-die systems.• Drive micro-architecture, RTL design, and integration of NoC subsystems, including coherency, QoS, and security features.• Oversee performance modeling, traffic analysis, and system-level simulation to ensure NoC meets latency and bandwidth requirements.• Collaborate with physical design teams to optimize NoC topology, floorplanning, and timing closure. 3. Cross-Functional Collaboration• Partner with CPU/GPU/AI accelerator, memory subsystem, and IP teams to define NoC interfaces and integration requirements.• Collaborate with software teams on NoC modeling frameworks, traffic generators, drivers, and firmware for validation and optimization.• Engage with product and system architects to align NoC capabilities with end-market requirements (AI/ML, datacenter, automotive, mobile).4. Execution & Delivery• Own NoC project planning, execution, and delivery, ensuring schedule adherence and quality.• Establish and improve design methodologies, verification flows, and automation for rapid, reliable development.• Support bring-up, debug, and performance validation in both pre-silicon and post-silicon environments.
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementProject ManagerID:58547
10,000 MYR ~ 15,000 MYRTanjung Tokong, Tanjung Bungah, Gelugur, Georgetown, Jelutong, Air Itam, Bayan Lepas, Bayan Baru, Batu Maung, Bukit Jambul, Perai, Sebarang Jaya工作内容
SummaryA construction project manager responsible for planning, scheduling, cost, quality, and safety management, coordinating with site teams, engineers, and subcontractors to ensure smooth execution and maintain As-built documentation.Key Responsibilities- Manage overall project planning, scheduling, quality, cost, and safety for construction projects.- Coordinate with site teams, design engineers, and subcontractors to ensure smooth project execution.- Review and approve construction drawings and design documents to ensure accurate implementation of design intent.- Oversee progress monitoring, budget control, and procurement of materials.- Ensure compliance with Safety, Health, and Environment (SHE) standards and implement risk management measures.- Analyze issues that arise during construction and propose and implement corrective actions.- Maintain and update As-built drawings and related documentation upon project completion.
福利制度
- Annual leave: 10 days
- Medical leave: 14 days
- Medical claims: RM1,000/year
- Accommodation
- OT allowance
- Performance appraisal twice yearly.
Mid year - Increment & promotion
Year end - bonus.Senior Layout and Physical Design EngineerID:58373
6,000 MYR ~ 15,000 MYRBayan Lepas, Bayan Baru工作内容
We are seeking analog/mixed-signal IP layout and physical design to lead layout implementation, RTL-to-GDSII execution and mentor juniors while working with top EDA tools. Be part of a team building high-performance semiconductor solutions. Job Description:• Independently execute layout of analog/mixed-signal IP blocks (e.g., ADCs, LDOs, PLLs, bandgaps, IOs)• Work closely with logic and circuit designers to meet performance, area, and matching constraints• Support top-level floorplanning and layout integration• Perform DRC/LVS/PEX and support sign-off processes• Participate in technical reviews and contribute to best practices in layout & physical design methodology• Block execution of physical design, including synthesis, Place and Route and Design and Timing Closure• Lead and guide junior engineers on the block execution
福利制度
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementKey Account Executive (Converting)ID:58222
5,000 MYR ~ 6,000 MYRTanjung Tokong, Tanjung Bungah, Gelugur, Georgetown, Jelutong, Air Itam, Bayan Lepas, Bayan Baru, Batu Maung, Bukit Jambul, Perai, Sebarang Jaya工作内容
<Job Description>1. Planning• Plans the budget for his/her territory and checks for compliance. The incumbent prepares the sales plan on the basis of the Annual Business Plan (ABP) including a customer planning for each particular customer/segment and a concept for further market development. He/She ensures an ongoing co-ordination in the planning process with the direct supervisor.2. Business Development• Execute market and sales strategy for designated market segment to ensure bettermarket coverage/penetration geared at profitable growth• Prospects, identify and generates profitable sales for the organization within the definedmarket.• Work together with borderless business support personnel to achieve borderlessbusiness objective.• The incumbent is to perform consultative selling to customers and have an in-depthknowledge of the market wants, needs and supply chain in order to keep abreast of themarket condition at all times.3. Sales Management• The incumbent manages sales activities in his/her business via customer managementon a direct user basis or via distributors.• He/She is expected to assist to grow the current sales turnover and to further developnew business on defined markets• He/She develops business plans and objectives for its key customers and monitors themfor compliance and takes required action in case of deviations.• He/She formulates sales approach for its customers in agreement with the Superior.Develops, implements and supervises customer pricing structures, service levels andproduct assortments.• He/She will coordinate with the Customer Service function on the delivery service toensure proper order processing for its accounts.• The incumbent will be responsible for the collection of outstanding AR in line with theestablished company policy and coordinate with Controlling the payment terms for newaccounts.• Conduct when required by company such as application and product presentations.He/She coordinates with Regional colleagues to conduct end-user visits to enhance TESAproduct positioning or to support application requirements.• The incumbent is responsible by assigned Market’s and will formulate strategy tosustain the growth in long term with the agreement from the superior.4. Reporting and Systems• Maintain and update detailed records of your activities and projects.• Prepare insightful monthly reports to keep the team updated.• Utilize our CRM system to track project information, status updates, and sales activities.
福利制度
<Benefits>
-Company car is provided
-Petrol Card
-KPI BonusesSales Engineer (Penang) ID:57813
6,000 MYR ~ 8,000 MYRTanjung Tokong, Tanjung Bungah, Gelugur, Georgetown, Jelutong, Air Itam, Bayan Lepas, Bayan Baru, Batu Maung, Bukit Jambul, Perai, Sebarang Jaya, Butterworth, Bukit Mertajam, Simpang Ampat, Juru, Nibong Tebal, Bukit Minyak, Batu Kawan工作内容
Our company specializes in the wholesale of electrical/electronic components, wiring accessories, and industrial machinery/equipment, mainly focusing on products related to industrial automation.As part of our business expansion in Malaysia, we are looking to hire a Sales to cover the Penang area. You will be responsible for promoting our products directly to manufacturing clients, particularly those in the semiconductor equipment industry.Main Responsibilities:・Develop new customers and expand our client base・Propose, sell, and provide after-sales support for our product lineup・Visit clients in Penang and surrounding areas using your own car (transportation allowance provided)・Collaborate with local distributors and expand direct sales channels・Work independently (no office in Penang; direct travel to/from client sites)・Prepare and submit sales reports and documentationYou will receive guidance and support from an experienced sales colleague who is already based in Penang.
福利制度
- EPF, SOCSO provided
- Bonus
- Medical allowance
- Transportation allowance: RM 850
- Phone allowance or company phone provided
