25个职位: 招聘信息 电路设计
Chip Layout Project LeadID:57870
8,000 MYR ~ 9,000 MYRKota Damansara/Petaling Jaya工作内容
【Job Responsibilities】• Participate in sub-blocks and module-blocks floor planning and routing from scratch.• Perform layout blocks verification with sign-off in area (such as DRC, LVS, ANT, ERC & PERC) and troubleshooting the results.• Good hands-on experience in analog layout device matching techniques, high speed shielding and validation, as well to have acquired broader knowledge in handling high voltage devices.• Co-work with architect, design lead, designers, layout lead and layout engineers to achieve modules/full chip integration, place and route, chip level verification and tape-out.• Responsible for layout optimization, post layout extraction and parasitic analysis by ensuring analog and mixed signals circuits meet chip level tape-out, sign-off at desired area, performance, and power.• Specific technical expertise is desired in a broad range of process technologies from Bipolar, CMOS, DMOS (BCD) to FinFET advance node in complex, high-performance analog and mixed signals circuits layout.• Proactively look for continuous improvement opportunities in the complete layout flow methodologies (flow, layout, and design) as well as develop accurate IC layout design schedules and resource estimates.
福利制度
- Annual Leave
- Medical Leave
- EPF
- SOCSO
- Performance Bonus (subject to personal performance)
- Salary increment (subject to yearly appraisal)
- Employee share (in discount price)
- Team gathering and activitiesSenior Chip Layout EngineerID:57871
6,000 MYR ~ 8,000 MYRKota Damansara/Petaling Jaya工作内容
【Job Responsibilities】• Participate in sub-blocks and module-blocks floor planning and routing from scratch.• Perform layout blocks verification with sign-off in area (such as DRC, LVS, ANT, ERC & PERC) and troubleshooting the results.• Good hands-on experience in analog layout device matching techniques, high speed shielding and validation, as well to have acquired broader knowledge in handling high voltage devices.• Co-work with architect, design lead, designers, layout lead and layout engineers to achieve modules/full chip integration, place and route, chip level verification and tape-out.• Responsible for layout optimization, post layout extraction and parasitic analysis by ensuring analog and mixed signals circuits meet chip level tape-out, sign-off at desired area, performance, and power.• Specific technical expertise is desired in a broad range of process technologies from Bipolar, CMOS, DMOS (BCD) to FinFET advance node in complex, high-performance analog and mixed signals circuits layout.• Proactively look for continuous improvement opportunities in the complete layout flow methodologies (flow, layout, and design) as well as develop accurate IC layout design schedules and resource estimates.
福利制度
- Annual Leave
- Medical Leave
- EPF
- SOCSO
- Performance Bonus (subject to personal performance)
- Salary increment (subject to yearly appraisal)
- Employee share (in discount price)
- Team gathering and activitiesSoC Digital DesignID:57872
5,000 MYR ~ 6,000 MYRKota Damansara/Petaling Jaya工作内容
【Job Responsibilities】• Experience in IP core design such as peripheral interfaces, CPU cores, digital controllers• Architecture review, RTL design, functional verification, post synthesis simulations.• Responsible for SoC system Integration & verification, SoC Architecture and Microarchitecture as well as SoC Peripherals design: GPIO, RTC, UART, 12C, 12S, &SPI• Experience in ARM CPU integration to SoC• Experience in SDRAM Memory Controller integration• Experience in interconnect matrix, AHB Bus Arbitration, multi-layer AHB Bus architecture• Excellent in Verilog RTL coding and simulation and FPGA prototype and verification• SD/SDIO relative experience is an added advantage.• AMBA Interface relative experience and knowledge in controller design (USB, PCIe, SATA, and Ethernet)
福利制度
- Annual Leave
- Medical Leave
- EPF
- SOCSO
- Performance Bonus (subject to personal performance)
- Salary increment (subject to yearly appraisal)
- Employee share (in discount price)
- Team gathering and activitiesSenior SoC Digital DesignID:57873
6,000 MYR ~ 9,000 MYRKota Damansara/Petaling Jaya工作内容
【Job Responsibilities】• Experience in IP core design such as peripheral interfaces, CPU cores, digital controllers• Architecture review, RTL design, functional verification, post synthesis simulations.• Responsible for SoC system Integration & verification, SoC Architecture and Microarchitecture as well as SoC Peripherals design: GPIO, RTC, UART, 12C, 12S, &SPI• Experience in ARM CPU integration to SoC• Experience in SDRAM Memory Controller integration• Experience in interconnect matrix, AHB Bus Arbitration, multi-layer AHB Bus architecture• Excellent in Verilog RTL coding and simulation and FPGA prototype and verification• SD/SDIO relative experience is an added advantage.• AMBA Interface relative experience and knowledge in controller design (USB, PCIe, SATA, and Ethernet)
福利制度
- Annual Leave
- Medical Leave
- EPF
- SOCSO
- Performance Bonus (subject to personal performance)
- Salary increment (subject to yearly appraisal)
- Employee share (in discount price)
- Team gathering and activitiesSoC Digital Design Project LeadID:57874
10,000 MYR ~ 12,000 MYRKota Damansara/Petaling Jaya工作内容
【Job Responsibilities】• Experience in IP core design such as peripheral interfaces, CPU cores, digital controllers.• Architecture review, RTL design, functional verification, post synthesis simulations.• Responsible for SoC system Integration & verification, SoC Architecture and Microarchitecture as well as SoC Peripherals design: GPIO, RTC, UART, 12C, 12S, &SPI.• Experience in ARM CPU integration to SoC.• Experience in SDRAM Memory Controller integration.• Experience in interconnect matrix, AHB Bus Arbitration, multi-layer AHB Bus architecture.• Excellent in Verilog RTL coding and simulation and FPGA prototype and verification.• SD/SDIO relative experience is an added advantage.• AMBA Interface relative experience and knowledge in controller design (USB, PCIe, SATA, and Ethernet).• Manage and guide the team members.
福利制度
- Annual Leave
- Medical Leave
- EPF
- SOCSO
- Performance Bonus (subject to personal performance)
- Salary increment (subject to yearly appraisal)
- Employee share (in discount price)
- Team gathering and activities
