421 Jobs
【Japanese Speaker】 Sales Specialist (System Integration)ID:59670
8,000 MYR ~ 10,000 MYRKota Damansara/Petaling JayaJob Description
The ideal candidate will be fluent in English and Japanese with a proven track record in solutions selling within the IT or technology sector. This role involves identifying and engaging with new business opportunities, nurturing client relationships, and achieving sales targets for complex IT solutions across Japanese-Oriented Companies in Malaysia.a. Lead Generation & Prospecting: • Actively identify, research, and qualify new business opportunities and leads for system integration projects in target industries (e.g., Japanese-Oriented Companies) within Malaysia, leveraging fluency in required languages.• Conduct outbound calls and emails outreach in Japanese or English to introduce our SI capabilities and generate interest.• Participate in industry events, technology forums, and networking activities (both virtual and in-person) to expand the professional network and capture leads specific to IT infrastructure, software, and services.b. Solutions Selling & Technical Understanding: • Develop a strong understanding of our core system integration offerings, including but not limited to: > Key Focus Solutions: Own Managed Services (e.g., Firewall Managed Services, IT Help Desk Services, RPAM Service & etc).• Other Solutions: i. Network Infrastructure (e.g., Firewall, LAN/WAN, Wi-Fi, Security solutions).ii. Server & Storage Solutions (e.g., On-premises, Virtualization, Cloud integration).iii. Cybersecurity Solutions (e.g., Endpoint Protection).iv. Cloud Services (e.g., IaaS, PaaS, SaaS integration, Hybrid Cloud).• Conduct compelling presentations and demonstrations tailored to the specific IT requirements and business challenges of clients, utilizing both languages effectively.• Collaborate closely with project team, vendor to understand client's existing IT environments and propose optimal, integrated solutions.• Understand customer requirements, pain points, and objectives to propose suitable and scalable IT solutions.c. Sales Cycle Management: • Prepare and present comprehensive proposals, quotation, and contracts in the client's preferred language (Japanese or English, often a blend).• Negotiate terms and close sales deals for complex IT projects to meet or exceed monthly, quarterly, and annual sales targets.• Manage the entire sales pipeline from lead generation to post-sale follow-up, ensuring smooth project handover to the delivery team.d. Client Relationship Management: • Build and maintain strong, long-lasting relationships with new and existing clients in both the private and public sectors through proactive communication and exceptional service.• Act as a primary point of contact for clients, addressing IT-related inquiries, resolving issues, and ensuring customer satisfaction throughout the project lifecycle in their preferred language.• Identify opportunities for upselling and cross-selling additional IT services, hardware, and software within the existing client base.• Gather client feedback and market intelligence specific to IT needs and challenges in the Malaysian market to contribute to solution development and sales strategy.e. Market Intelligence & Strategy: • Stay informed about IT industry trends, emerging technologies, market conditions, and competitor offerings within the Japanese-Oriented Companies system integration landscape.• Provide insights into local business practices, cultural considerations, and communication styles to optimize sales approaches within Malaysia.f. Reporting & Administration: • Maintain accurate and up-to-date client information, sales activities, and project statuses in organized format.• Generate regular sales reports, forecasts, and pipeline analyses specific to IT projects.• Manage & collaborate administrative tasks related to sales orders, solution contracts, and invoicing with finance team.
Benefit
- Employment: Permanent
- Working place: Petaling Jaya, next to Surian MRT
- Medical expense assistance: Company will support up to RM100/monthSales Senior Executive (Japanese Speaker)ID:59672
8,000 MYR ~ 10,000 MYRKepong, Sungai BulohJob Description
・Sales & Business Development: Manage the import and distribution of Japanese food products (snacks, seasonings, etc.) to local retailers and Japanese supermarkets.・Merchandising & Strategy: Collaborate with retailers on floor planning and shelf management to enhance product visibility and consumer appeal.・Promotional Activities: Execute marketing initiatives, including POP displays, promoter management, and organizing "Japan Fair" events.・Market Analysis: Analyze consumer lifestyles and trends to provide tailored marketing solutions and store layouts.・Operations & Follow-up: Oversee the end-to-end sales process from local distribution to delivery (Sourcing is managed by the Japan HQ).・Reporting & Leadership: Manage sales progress for group companies, report to senior management, and lead a local sales team (1–2 subordinates).
Benefit
・Basic Salary: RM 8,000 ~ RM 10,000
・AL: <2Y 12d, 2~3Y 18d, 3~5Y 18d, >5Y 20d
・MC: <2Y 14d, 2~5Y 18d, >5Y 22d
・Medical Benefits
・Medical, Accident and Life Insurance coverage upon confirmation
・Bonus (subject to company performance)
・Company Activities: Team Building, Company TripClient Service ExecutiveID:59669
3,000 MYR ~ 5,000 MYRBandar Sunway/PuchongJob Description
■ JOB OVERVIEWWe are looking for a proactive and logical Client Service Executives to act as a trusted partner to our clients. In this role, your key focus will be approaching new clients, understanding their core business challenges, and leading digital marketing projects to solve them. You will be responsible for the end-to-end process: from conducting client hearings and briefing internal teams, to compiling proposals, presenting solutions, and managing project profitability.While this is fundamentally a client-facing and project management role, logical thinking and data analysis are essential tools you will use daily to identify issues, build persuasive, data-driven proposals, and guide client business to success.■ KEY RESPONSIBILITIES・Client Partnership & Business Development: ・ Approach new clients and conduct thorough hearings to understand their business challenges, target audience, and marketing goals. ・ Build and maintain strong relationships, acting as a collaborative partner dedicated to solving their business issues.・Proposal Creation & Presentation: ・ Translate client challenges into clear, actionable briefs for the creative and production teams ・ Compile comprehensive proposal materials by synthesizing team ideas and utilizing data analysis to back up your strategies. ・ Present ideas, strategic marketing plans, and logical conclusions effectively to clients.・Project & Financial Management: ・ Drive the execution of digital marketing projects (including websites, SNS operations, creative, and online ads) alongside internal teams. ・ Manage project financials, keeping a close eye on revenue, budgets, and profit margins to ensure healthy project P&L. ・ Oversee administrative tasks such as quotations, billing, and schedule management.・Data-Driven Problem Solving: ・ Utilize logical thinking and an evidence-based approach to uncover the root causes of client challenges and formulate effective, realistic solutions.
Benefit
・Salary = RM 4,000 ~ RM 5,500
・Annual leave 12 days/year, increase by years.
・Bonus: once a year
・Incentive: depends on company performance
・Company support parking fee or public transportation fee.
・Private insurance for medical care
・Social Security Contribution
・Education and training
・Overseas Business Travel (Thailand, Vietnam, Singapore)
・Company Trip (depends on company performance)
・Customized education environment by CourseraSales Manager (Johor)ID:59657
10,200 MYR ~ 11,200 MYRJohor BahruJob Description
We are looking for a dynamic and results-driven Sales Manager to lead and grow our Decorative Project business within Southern region. In this role, you will drive sales performance, expand market share, and lead a high-performing sales team to deliver sustainable growth in line with company objectives.This position will be based in Johor and reporting to Senior Sales Manager, Project.Job description:- Develop and execute sales strategies to achieve targets for revenue, gross margin, DSO, and market share within Southern region.- Conduct comprehensive market mapping to identify growth opportunities, monitor market trends, economic indicators, customer demand, and competitor activity.- Lead, coach, and motivate the sales team to achieve objectives, ensuring alignment with company values and culture.- Monitor daily sales activities, track performance metrics, and provide hands-on guidance to drive results.- Build and maintain strong relationships with customers, dealers, contractors, and consultants through regular site visits and project follow-ups.- Resolve customer concerns, support product application and supply matters, and ensure high levels of customer satisfaction.- Analyze monthly sales and collection reports, identify gaps, and implement corrective actions to improve performance.- Monitor collections and DSO to ensure healthy cash flow and financial discipline.- Conduct regular performance reviews and provide constructive feedback to support employee development.- Collaborate closely with internal stakeholders to ensure seamless workflow and customer-centric solutions.
Benefit
- Transport Allowance
- Mobile Claim
- Petrol Card
- Quarterly Incentive
- Annual Leave 15 days
- Medical Leave 14 days
- Medical Insurance
- Medical claim: RM5000/year for outpatient, RM40K/year for hospitalization
- Performance bonus (February)Sr Library Design EngineerID:59656
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a Library Design Engineer to own the end-to-end development of a production-grade standard cell library on leading-edge process nodes. You will drive transistor-level design, multi-Vt cell topology, full characterization, and PPA validation delivering robust, sign-off-ready library views to downstream implementation flows. Seniority level to be determined by experience.Key Responsibilities• Design, simulate, and analyze standard cell circuits at transistor level, including combinational, sequential, clock, and physical utility cells across multiple Vt flavors (HVT/SVT/LVT/ULVT) and drive strengths.• Perform layout process-node-shift; guide layout clean-up effort and review for DRC/LVS compliance, EM/IR rules, and parasitic awareness at the cell level.• Define & execute characterization flow to generate complete library views & models, covering timing (NLDM/CCS/ECSM), power (dynamic, leakage, internal), noise, and variation-aware models (LVF/SOCV/POCV); ensure Liberty, LEF, and GDS consistency.• Define & execute QA regression to check library quality; validate cell robustness including noise margin, drive strength, X-propagation, and scan/DFT cell correctness; drive STA correlation using PrimeTime or Tempus to confirm model accuracy in real PD flows.• Lead standard cell library IP integration into Testchip, including Testchip circuit and test plan development; support hardware bring-up and debug.• Perform pre/post-silicon correlation & model/design optimization; drive root-cause analysis for first-silicon issues and implement yield/robustness improvements.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSr eFUSE Design EngineerID:59655
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking an eFUSE Design Engineer to own the end-to-end development of production-grade eFUSE IP on leading-edge process nodes. You will drive eFUSE array architecture, circuit design, full simulation-based verification, collateral and view generation, and quality checks — delivering robust, sign-off-ready eFUSE IP to downstream SoC integration flows. Bitcell-level design knowledge is valued; direct bitcell design experience is a plus but not required. Seniority level to be determined by experience.Key Responsibilities• Design and architect the eFUSE array circuit, including sense amplifier, reference bias, programming current control, address decoder, column multiplexer, and repair logic; ensure correct functional operation across all PVT corners.• Develop and execute comprehensive simulation plans for the eFUSE macro, covering DC/AC characterization, programming/read margin analysis, retention, endurance, and reliability corner simulations (MC, Mismatch, Aging); validate against product specifications and foundry bitcell models.• Generate and validate all required IP deliverable views and collateral: timing models (Liberty .lib), physical abstracts (LEF/GDS), behavioral models (Verilog), datasheets, and application notes; ensure consistency across all views and compliance with delivery checklist.• Define and execute IP quality checks (QC) and quality assurance (QA) regression suites; run DRC/LVS/ERC/PEX sign-off on the eFUSE macro layout; conduct formal and simulation-based functional verification; ensure all sign-off criteria are met prior to IP release.• Collaborate with the foundry and PDK team on eFUSE bitcell characterization data, SPICE models, and process design rules; translate foundry bitcell specifications and reliability requirements into array-level design constraints.• Support Testchip integration of the eFUSE macro, including test circuit design, programming and read test plan development; assist in hardware bring-up, failure analysis, and silicon–to–simulation correlation.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSr Analog Circuit Design Engineer (General Purpose I/O) (GPIO)ID:59654
8,000 MYR ~ 16,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. The candidate should have specialized expertise in GPIO (General Purpose I/O) design as described below. Seniority level to be determined by experience.Key Responsibilities• Own GPIO IP architecture/specs: bidirectional I/O, mixed-voltage/failsafe tolerance, programmable drive strength & slew-rate control, Schmitt-trigger inputs, pull-up/pull-down, bus-keeper/retention, and pad-ring support cells (supply, corner, filler, terminator/diode-breaker, cut cells).• Design and implement transistor-level GPIO circuits: input receiver, output driver, level shifters, predrivers, reference/compensation sub-blocks, analog test hooks.• Ensure robust reliability and quality signoff for I/O cells and rings (ESD, latch-up, EM/IR, aging, overstress, noise immunity and ground-bounce/SSN considerations).• Run comprehensive simulations and verification (PVT corners/Monte Carlo, pre- and post-layout, worst-case timing and functional modes) and drive design reviews with clear documentation.• Develop and release collateral for IP enablement: datasheets, integration guidelines, characterization reports, and models (SPICE/Verilog-A, and IBIS where applicable).• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.• Perform SI/PI and I/O behavior checks at the package/board interface level; support IBIS-based signoff and customer debug as needed.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSr Analog Circuit Design Engineer (Clocking)ID:59653
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. The candidate should have specialized expertise in Clocking as described below. Seniority level to be determined by experience.Key Responsibilities• Design and debug PLL/DLL architectures and circuits (integer/fractional-N; analog or digital-assisted).• Oscillators: LC or ring-oscillator (RO) VCO/DCO, frequency synthesis, phase noise/jitter analysis and budgeting.• Delay lines, measurement/ruler circuitry, phase interpolators, and calibration/trim techniques.• DCC/DCM/DCA, clock tree/distribution, and clock management units; low-jitter clock generation and distribution networks.• Own end-to-end block/IP delivery: architecture studies, specification, transistor-level design, simulation, post-layout sign-off, and silicon bring-up/characterization.• Behavioral modeling (e.g., Verilog-A/SystemVerilog) to explore loop dynamics, spur/jitter mitigation and system interactions.• Build verification test benches; validate performance across PVT corners, mismatch/Monte Carlo (as applicable), and post-extraction parasitics.• Work closely with layout/mask designers: floorplanning guidance, layout reviews, and ensuring LVS/DRC clean implementation and parasitic awareness.• Meet quality and reliability requirements (e.g., EM/IR, aging/overstress); contribute to robust design methodology and sign-off checklists.• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSr Analog Circuit Design Engineer (High-Speed I/O)ID:59652
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. The candidate should have specialized expertise in High-Speed I/O as described below. Seniority level to be determined by experience.Key Responsibilities• Design TX/RX, analog front-end, serializers/deserializers, high-speed level shifters, predrivers/drivers, and termination/impedance calibration blocks.• Equalization: Feed-Forward Equalization (FFE), DFE, CTLE and related adaptation/control loops.• Clocking support for links (e.g., CDR interactions, low-jitter clock generation/distribution as needed by PHY).• SI analysis and creation/validation of IBIS/IBIS-AMI models; channel characterization (insertion loss, return loss, crosstalk) and eye diagram margin assessment.• Own end-to-end block/IP delivery: architecture studies, specification, transistor-level design, simulation, post-layout sign-off, and silicon bring-up/characterization.• Build verification test benches; validate performance across PVT corners, mismatch/Monte Carlo (as applicable), and post-extraction parasitics.• Work closely with layout/mask designers: floorplanning guidance, layout reviews, and ensuring LVS/DRC clean implementation and parasitic awareness.• Support interface integration and sign-off: PPA optimization, reliability checks (e.g., EM/IR, aging/overstress), and timing closure collaboration.• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSr Analog Circuit Design Engineer (Pure Analog)ID:59651
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. Seniority level to be determined by experience.Key Responsibilities• Reference generation: bandgap, bias circuits, reference voltages/currents; high-accuracy, low-noise design techniques.• Low offset / low-noise voltage regulators (LDO) and stability/compensation networks; PSRR and transient response optimization.• Voltage and power monitoring circuits: droop detection, voltage detectors, PowerGood and POR generation, analog sensing, and housekeeping blocks.• Power-management components, linear and/or switching-adjacent blocks, charge pumps, as applicable to the SoC/PHY environment.• Design/support ADC/DAC blocks and associated analog support circuits (sampling, references, amplifiers/comparators, clocking).• Voltage and temperature sensor design and characterization. Bandgap and PTAT-based temperature sensing; process corner detection circuits. Sensor readout, digitization, and calibration techniques.• Own end-to-end block/IP delivery: architecture studies, specification, transistor-level design, simulation, post-layout sign-off, and silicon bring-up/characterization.• Build verification test benches; validate performance across PVT corners, mismatch/Monte Carlo (as applicable), and post-extraction parasitics.• Work closely with layout/mask designers: floorplanning guidance, layout reviews, and ensuring LVS/DRC clean implementation and parasitic awareness.• Meet quality and reliability requirements (e.g., EM/IR, aging/overstress); contribute to robust design methodology and sign-off checklists.• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment