18 Jobs: Job Vacancies for Mechanical Design Positions
Lead Mechanical Engineer (HVAC)ID:60631
8,000 MYR ~ 13,000 MYRBayan LepasJob Description
• Responsible for the overall calculation and design of HVAC systems in accordance with project requirements and client specifications and national codes, including but not limited to air-conditioning system, de-smoke systems and process exhaust systems, etc. • Lead the team to complete the detailed design of HVAC systems, review design drawings, technical parameters, and solve key technical problems in the design process• Track cutting-edge HVAC technologies in the industry, promote technology optimization and application, and reduce project energy consumption and operation costs• Leading and coordinating discipline interface• System shop drawing review & approval, technical submittal review & approval• Project site construction schedule, quality and safety coordination• Participate in the preparation of technical proposals for project bidding, provide professional technical support, and assist the business team in project negotiation
Benefit
- Annual Leave starting from 8 days
- Medical Leave starting from 14 days
- Transport Allowance
- Meal Allowance
- Medical Benefits
- Performance Bonus
- Yearly IncrementTool Design Engineer (Stamping)ID:60454
3,860 MYR ~ 5,360 MYRBukit MinyakJob Description
- Provide new material spec., Tooling information, Design checklist, DFMEA.- New tool design layout and drawings.- Participate in new tool assembly and debugging tool.- Involved in improvement project and modification tool with Die Maintenance Department.- To order standard part and follow up delivery lead time according to tooling schedule.- Involve in vendor fabrication quality issue and delivery issue to meet the tooling schedule.- Review of FA report and follow-up on sample submission.- Participate in transfer tooling project for buy off.- To handle other tasks and duties as and when requested by superior.
Benefit
- AL: 12 days, increase gradually based on company policy.
- Individual Insurance
- Medical RM200/year & Dental RM300/year
- Toll claimable (Candidate from Island only)
- Mobile allowances (Depend)
- Individual bonus - 1month fixed
- Increment every year (July) -Rate based on performanceDFT Logic Design Engineer (Senior/Staff)ID:60263
8,000 MYR ~ 20,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
Job SummaryWe are seeking an experienced Senior/Staff DFT Logic Design Engineer to support the company's ASIC, SoC, and IP development initiatives in the area of Design for Testability (DFT). The engineer will be responsible for defining DFT architecture, implementing and verifying DFT features, integrating scan and BIST structures at the RTL level, and driving fault coverage from design through silicon bring-up. The role involves close collaboration with RTL, Verification, Physical Design, and Test Engineering teams to deliver high-quality DFT implementation for digital IP and ASIC products.Key Responsibilities1. DFT Architecture & Planning• Define and own the DFT architecture for digital IP and ASIC projects, including scan insertion strategy, compression ratios, JTAG/IEEE 1149.1 boundary scan, MBIST/LBIST planning, and DFT microarchitecture.• Document and maintain DFT specifications throughout the design cycle.• Lead the planning and execution of various DFT feature implementation and verification.2. DFT RTL Design & Integration• Develop and integrate DFT RTL (SystemVerilog/Verilog), including scan wrappers, scan controllers, BIST controllers, test access ports (TAP), and clock/reset control logic.• Implement Memory BIST logic insertion, integration, and verification for IP and ASIC projects.• Ensure DFT structures are synthesis-clean, timing-closed, and do not impact functional performance or power.3. Scan, ATPG & Verification• Implement scan architecture including scan chain stitching, scan controller generation, test compression, and scan timing closure.• Run ATPG to generate and validate stuck-at, transition, path-delay, and cell-aware fault pattern sets.• Perform gate-level simulation (GLS) to verify scan design.• Generate DFT collateral including MBIST patterns, ATPG patterns, scan constraints, timing constraints, BSDL files, and related documentation.• Achieve and sign off target fault coverage metrics.4. Design Quality & Validation• Collaborate with RTL designers to establish DFT-aware coding guidelines.• Perform DFT rule checking, CDC analysis, Lint, and static quality checks to identify and resolve testability violations early in the design cycle.• Support netlist validation through LEC and STA during implementation and timing closure.• Resolve DFT-related ECOs prior to tape-out.5. JTAG & Boundary Scan• Design and verify TAP controllers.• Implement and verify JTAG/Boundary Scan architecture at IP and SoC level.• Generate BSDL files and support Boundary Scan verification.6. Post-Silicon & Manufacturing Support• Support post-silicon validation, silicon power-on, ATE bring-up, and high-volume manufacturing testing.• Work with test engineers to debug ATPG patterns, analyze yield data, and identify root causes related to RTL or physical design issues.• Support test pattern bring-up and production test activities.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Software Engineer (PLC) ID:60017
6,000 MYR ~ 8,500 MYRBayan BaruJob Description
• Design, development, and implementation of PLC and/or PC based software solutions• Perform system integration, testing and commissioning of advanced control systems for equipment automation system.• Participate in control system requirement analysis.• Involved in drafting of functional specifications and detailed design specification.• Provide technical onsite support to external and internal customers.• Interpret client requirements, identify design parameters, and ensure solutions are implemented accurately and within budget to meet project requirements and schedules• Ensure software issues are resolved in a timely manner
Benefit
Salary package: ~RM5,000 - RM7,000
AL: Starting from 12 days
SL: 14 / 18 / 22 days
<Others>
• Mobile phone reimbursements/transport allowances
• Medical insurance
• Medical claim
*The rest of the benefits, they will be able to share during interview sessionSenior Mechanical Design EngineerID:60011
5,000 MYR ~ 8,000 MYRBayan BaruJob Description
• Conduct equipment design & development work according to customers and internal specifications.• Act as project lead to plan, organize and co-ordinate their respective project’s meetings to review design and ensure projectsare kept to schedule.• Maintain and control relevant documents related to R & D activities per requirements.• Maintain, keep track, and ensure Billed Materials is updated.• Generate detailed 2D/3D drawings• Raise ECN for update of changes to design and drawings and follow up on approval and ECN flow.• Provide technical support to process & production, supply chain & QA for review and troubleshooting of design and drawings
Benefit
Salary package: ~RM5,000 - RM7,000
AL: Starting from 12 days
SL: 14 / 18 / 22 days
<Others>
• Mobile phone reimbursements/transport allowances
• Medical insurance
• Medical claim
*The rest of the benefits, they will be able to share during interview sessionDesign Verification Engineer (Senior/Staff/Principal)ID:59121
10,000 MYR ~ 30,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
We are seeking a highly experienced and technically profound Design Verification Engineer. This role will be responsible for RTL verification, debug, functional coverage and SVA assertion development, UVM testbench development, testplan development and new verification methodology.Key Responsibilities- Develop and maintain UVM-based verification environments for IP designs.- Create detailed test plans based on design specifications, architectural documents, and use-case scenarios.- Implement constrained-random testbenches, scoreboards, and monitors to validate functional behavior.- Perform coverage-driven verification, including:a. Functional coverage (covergroups, coverpoints)b. Code coverage (statement, branch, toggle)c. Assertion coverage (SystemVerilog assertions)- Drive coverage closure by identifying gaps and enhancing test scenarios.- Execute gate-level simulations to validate timing, reset sequences, and power-up behavior post-synthesis.- Apply Formal Property Verification (FPV) to prove critical design properties and uncover corner-case bugs.- Debug simulation failures and collaborate with RTL designers to resolve issues efficiently.- Document verification results, coverage metrics, and regression summaries for traceability and quality assurance.
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementCircuit Design Manager / Senior ManagerID:59119
15,000 MYR ~ 35,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
• Lead and manage team that design and implement high speed interfaces and complex mixed-signal circuits using cutting-edge CMOS tech and EDA tools.• Manage deliveries between function groups for example Layout, RTL , DV , Physical Design and SIPI/Package.• Harmonize schedule and end to end delivery• Work closely with business development team to understand future projects and resource needed• First line of clarification and explanation for customer related questions and support• Work with post silicon team for design intent and required validations
Benefit
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment【Japanese Spakers】Mechanical Design EngineerID:58136
3,000 MYR ~ 4,500 MYRShah AlamJob Description
- To design simple assembly and parts drawing based on modification needed.- To understands the basic characteristics of the works and design - Handle machine order, selection of optimal units according to customer specification and issuance of overall machine with the guidance from supervisor.- To design medium scale option by referring to similar design with the support from supervisor.- To take part in specification confirmation and ISO quality management procedure for Design Department.- Communicate with other departments to ensure any projects are carrying out smoothly and complete according to requirements.- To do improvement in Quality, Cost, Delivery (QCD) project from time to time.- Responsible for ISO9001 and drawing documentation carry out accordingly.- To perform any duty assigned by the immediate superior from time to time.- Responsible to take on additional roles or tasks assigned by management or superior from time to time.
Benefit
- EPF, SOCSO, EIS provided
- Bonus (Around 1.5 months - depends on performance)
- Salary Increment after Probation (Around 150~200)
- Transportation allowance (Can Claim)
- Sharing company car for visiting
- AL : 12, MC: 12
- Flex Working time
Working on Saturday - 50%
OT: ×1.5/h (Sat×1.5, Sun×2, Public holidays×3)
*Their project is conducted during long holidays, so must attend work on holidays.
Can replace the day off during the weekday.
e.g.) project during Hari-raya (6 days)
⇒ attend 3 days and switch with another staff.