96 Jobs: Job Vacancies for Engineer(Electrical/Semi-Conductor) Positions
Field Application Engineer (Electronic)ID:58676
5,600 MYR ~ 6,100 MYRGeorgetownJob Description
• Drive design in and product promotional activities • Spearhead development of new demand creation accounts• Align and coordinate with suppliers for all technical promotion activities• Excellent troubleshooting skills to provide in-depth technical support to customers• Conduct seminars and training to customers
Benefit
- RM1,100 travel allowance
- Mobile phone claims up to RM200
- 12 days AL
- Medical Claim RM 50 per visit, RM 500 max per year
- Dental RM 200 per year
- 1 month fixed bonus
- Annual Health Screening
- Bonus pay-out twice a year
(June and Dec, Average 1.5 - 3.0 months per year)
- Kick-off meeting tripConsulting Enginner (Mechanical/Electrical)ID:58647
3,500 MYR ~ 7,500 MYRKota Damansara/Petaling JayaJob Description
1. To provide solutions to potential clients in the Critical Application and Data Centre industry for Mechanical and Electrical (M&E) infrastructure requirements.2. To develop a strong foundation in engineering designs in Electrical and Mechanical applications in the Data Centre industry.3. To provide sound technical and design advice to ensure a smooth delivery of Data Centre projects.4. To be actively involved in Data Centre project implementations, supporting the project team in technical and design areas.5. To provide assistance to the Sales Department in the following areas:- Site visits to potential project sites- Technical Meetings with potential and existing clients- Liaise with vendors and suppliers for cost sourcing- Prepare Bill of Quantities, Design Data and Schematic Drawings- Prepare Solution and Site Preparation Proposals- Prepare product information and data- Prepare tender submittals for current Products and Services- Prepare presentation material for presentation to existing and potential clients- To do active market research on current and trending technology, products and services- To perform other works as instructed by superior when required
Benefit
Transport Allowance – RM 500
Annual Leave – 12 Days
Medical Leave – 14 Days
Medical Claim – RM 600 per annum
Group Insurance – Hospital and Surgical
Performance Bonus – Review annually
Dental – RM 200 per annum
Spectacle – RM200 Per annumElectrical Design Engineer (Hardware)【Japanese Speaker】ID:57881
2,980 MYR ~ 4,500 MYRUSJ/Subang JayaJob Description
【Job Responsibilities】 Understand machine structure, hardware and software system Design new unit/machine part according to requirement and specification (Minor/Major) Understand and prepare operation manual/electrical wiring manual for customer Fully in charge of machine trouble shooting in house. To provide support/information to customer for machine operation and problem solving. In charge of small scale hardware design (i.e. add sensor, solenoid valve) with/without guidance from superior. Understand hardware wiring diagram and all electrical components used in machine. To provide information to Production Engineer regarding machine general movement and unit movement. To help in improving existing machine. Help in doing machine cost down. Carry on duties assigned by the superior from time to time.
Benefit
- Annual Leave
- Medical Leave
- Language Allowance
- Commuting Allowance
- Tol Reimbursement
- Attendance Incentive
- Mean Allowance
- Company Canteen
- EPF & SOCSO
- Group Inpatient Insurance
- Group Outpatient
- Company Uniforms
- Company Shoes
- Dental
- Outpatient Specialist Consultation
- Annual Increment
- OT Paid
- Company BonusEquipment Engineer ID:58611
4,000 MYR ~ 6,000 MYRPeraiJob Description
Position purpose & Summary:1.Direct and coordinate machines operation, maintenance, and repair of equipment.2.Effective spare part control and up keep all machines run in good condition.3.Plan and control effective PM system.Primary duties & Responsibilities:1. Plan and execute effective Preventive Maintenance.2. Effective spare part control, all mc must be in tip top condition3. Work with Electrical Engineer to coordinate plant equipment4. Keep machines down time to minimum level.5. Direct involve in all new machines installation, operational and testing.6. Design and direct engineering personnel in fabrication of equipment need, determine method, procedure and condition.7. Ensure highest possible product quality and adherence to Kobelco Quality System, ISO and/or others standard.8. Maintain a clean and safe work environment. Keep work area clean and always practice 5S.9. Develop and maintain effective cost control.10. Perform other duties as assigned.Accountability:Will be responsible on maintaining all plant wide equipment including facilities, continuous repeatable process with proper documentation , will manage given project on timely manner and keep to scope at all time.
Benefit
AL:
14 days : Less than five (5) years of continuous service -
16 days : Five (5) to less than ten (10) years of continuous service
18 days : Above ten (10) years of continuous service
- Company Insurance
- Medical Consultation & Panel Doctor
- Performance Bonus (Subject to company performance)
- Company Trip (entitled when serve at least 1 year)
- Entertainment Session (depends)Senior Staff IP Logic Design / MicroarchitectID:58605
15,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
The Senior IP Logic Design Engineer will be responsible for the design and implementation of logic design, microarchitecture definition, RTL coding, IP releases, high speed timing convergence, and collaboration with cross-functional teams to meet project specifications. Tasks also include performance optimization and ensuring design functionality through verification and validation processes.Key Responsibilities:1. IP Design Responsibility• Define and design Unit Level / Layer Level IP Design that able to converge timing at high end process node, with high frequency requirements.• Ability to drive a low power and complex design to completions.2. IP Quality Responsibility• Ability to orchestrate the team on validation requirements to catch all possible boundary conditions of logic bugs.3. IP Releases• Deep knowledge on Lint and CDC flow and ability to drive the Lint and CDC convergence.
Benefit
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Staff IP Logic Design / MicroarchitectID:58607
8,000 MYR ~ 15,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
The Senior IP Logic Design Engineer will be responsible for the design and implementation of logic design, microarchitecture definition, RTL coding, IP releases, high speed timing convergence, and collaboration with cross-functional teams to meet project specifications. Tasks also functional validation through black box and white box validation, FPV validation, functional validation as well as emulations.Key Responsibilities:1. IP Design Responsibility• Define and design Unit Level / Layer Level IP Design that able to converge timing at high end process node, with high frequency requirements.• Ability to produce testplans to cover design requirement2. IP Quality Responsibility• Ability to execute design validations, FPV, lintra, CDC and etc tools3. IP Releases• Owning the IP Releases for customer release depending on the assignment
Benefit
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementIP Logic Design Principle EngineerID:58602
20,000 MYR ~ 30,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/PuchongJob Description
The IP Logic Design Principle Engineer will be responsible for architecting microarchitecture design implementation of an IP, spanning across all IP stack such as application layer, transaction layer, link layer, die to die layer, physical layer. Ability to code verilog / system verilog RTL for complex IP, review RTL coding, orchestra IP development phase for projects from beginning to completion. This includes the ability to technically drive the IP team on Design / Validation in completing technical tasks up to IP releases for customers. Candidate must be also capable of solving high speed timing convergence on various processes and collaborate with cross-functional teams to meet project specifications. The role will drive performance optimization and ensuring design functionality through verification and validation processes.Key Responsibilities:1. IP Microarchitecture Definitions• Define microarchitecture definition across layers and define a clean inter unit partition requirements.• Drive design team to deliver best-in-class IP design that optimizes for area, latency, power and performance.• Ability to distribute and drive the design team to implement high quality design and meeting time to market requirements.2. IP Design Responsibility• Implement very complicated high-speed design which can converge timing convergence at high frequency.• Capable of orchestrating the team on right directions of timing convergence, CDC, lintra and etc. for tools closure.3. IP Quality Responsibility• Review IP design and validation testplan to make sure IP Design is at top notch quality.4. IP Releases• Deep knowledge on Lint and CDC flow and ability to drive the Lint and CDC convergence.
Benefit
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementIP Engineering DirectorID:58600
25,000 MYR ~ 40,000 MYRBayan Lepas, Bayan BaruJob Description
Highly skilled and visionary IP Engineering Director, to lead the development and delivery of reusable semiconductor IP that powers advanced SoCs, chiplets, and multi-die solutions. This role requires deep expertise in semiconductor IP design, verification, and integration, combined with proven leadership in building and managing engineering teams. While the position is primarily focused on hardware IP development (digital, analog, or mixed-signal), software development experience—such as firmware, device drivers, or modeling frameworks—is a strong plus, enabling HW/SW co-design, system-level optimization, and accelerated customer adoption. The IP Engineering Director will define technical roadmaps, oversee execution, and collaborate with cross-functional teams to deliver silicon-proven IP solutions that meet aggressive power, performance, and area (PPA) targets.Key Responsibilities1. Leadership & Strategy• Define and execute the company’s IP engineering roadmap aligned with product strategy.• Build and lead a world-class IP engineering team across design, verification, validation, and integration.• Mentor and develop engineering leaders, fostering innovation, collaboration, and technical excellence.• Drive continuous improvement in design methodology, automation, and productivity.2. IP Development & Execution• Lead architecture, micro-architecture, and RTL design of reusable IP (e.g., memory interfaces, high-speed I/Os, interconnects, SerDes, or accelerators).• Oversee verification, validation, and sign-off, ensuring robust, silicon-proven IP delivery.• Collaborate with SoC, package, and system teams for seamless integration into chiplet and multi-die systems.• Support post-silicon debug, bring-up, and customer deployment of IP blocks.3. Cross-Functional Collaboration• Partner with software teams on firmware, drivers, and simulation frameworks to ensure full-stack enablement.• Engage with product, SoC, and system architects to align IP functionality with end-market requirements.• Collaborate with foundries, EDA vendors, and ecosystem partners to enhance IP design flows and deployment.4. Program Management & Delivery• Own IP program planning, milestones, schedules, and risk management.• Ensure timely delivery of high-quality IP to internal design teams and external customers.• Drive design reuse and scalability across multiple projects and product lines.5. Execution & Delivery• Own NoC project planning, execution, and delivery, ensuring schedule adherence and quality.• Establish and improve design methodologies, verification flows, and automation for rapid, reliable development.• Support bring-up, debug, and performance validation in both pre-silicon and post-silicon environments.
Benefit
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementNetwork-on-Chip (NoC) Team Engineering DirectorID:58599
25,000 MYR ~ 40,000 MYRBayan Lepas, Bayan BaruJob Description
This role will lead the architecture, design, and development of high-performance interconnect solutions for SoCs, chiplets, and advanced packaging systems. The ideal candidate will have deep expertise in NoC architecture, RTL/micro-architecture design, performance modeling, and verification, combined with strong leadership skills. Experience in both hardware and software development is a strong plus, as it enables system-level optimization, modeling, and seamless HW/SW co-design for next-generation NoC solutions. The NoC Team Director will drive technical strategy, manage execution, mentor a multidisciplinary team, and collaborate with cross-functional partners to deliver state-of-the-art interconnect IP for data-intensive and AI-driven applications. Key Responsibilities1. Leadership & Strategy• Define and execute the company’s NoC technology roadmap, aligned with product and system- level requirements.• Build, mentor, and lead a high-performing team of architects, designers, verification engineers, and performance modelers.• Foster innovation in NoC design, methodology, and automation to achieve best-in-class power, performance, and area (PPA).2. NoC Architecture & Design• Lead the design of scalable, configurable, and high-bandwidth NoC architectures for heterogeneous SoCs and multi-die systems.• Drive micro-architecture, RTL design, and integration of NoC subsystems, including coherency, QoS, and security features.• Oversee performance modeling, traffic analysis, and system-level simulation to ensure NoC meets latency and bandwidth requirements.• Collaborate with physical design teams to optimize NoC topology, floorplanning, and timing closure. 3. Cross-Functional Collaboration• Partner with CPU/GPU/AI accelerator, memory subsystem, and IP teams to define NoC interfaces and integration requirements.• Collaborate with software teams on NoC modeling frameworks, traffic generators, drivers, and firmware for validation and optimization.• Engage with product and system architects to align NoC capabilities with end-market requirements (AI/ML, datacenter, automotive, mobile).4. Execution & Delivery• Own NoC project planning, execution, and delivery, ensuring schedule adherence and quality.• Establish and improve design methodologies, verification flows, and automation for rapid, reliable development.• Support bring-up, debug, and performance validation in both pre-silicon and post-silicon environments.
Benefit
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementAI EngineerID:58562
3,500 MYR ~ 7,000 MYRMalaccaJob Description
The AI Engineer will be responsible for developing, implementing, and maintaining machine learning models and AI solutions to optimize manufacturing processes. This role involves working closely with cross-functional teams to collect data, identify process bottlenecks, and translate operational challenges into data-driven insights that improve productivity, yield, and quality.• Design, develop, and deploy machine learning models to support predictive maintenance, process optimization, defect detection, and yield improvement.• Designing AI systems to monitor machinery and predict potential failures, allowing for maintenance before costly downtime occurs.• Collect, clean, and preprocess large datasets from production lines, sensors, and quality control systems.• Collaborate with production and equipment engineers to identify use cases for AI implementation.• Develop algorithms for anomaly detection, process control, and root-cause analysis.• Implement data visualization dashboards for real-time process monitoring.• Conduct model performance evaluation and continuous improvement.• Support integration of AI solutions into manufacturing systems (e.g., MES, PLC, SCADA).• Stay updated on AI/ML trends and recommend new tools or technologies for factory digitalization.• Document methodologies and ensure reproducibility of models and results.• Utilizing AI to fine-tune production workflows, minimize energy consumption, and reduce waste, thereby increasing overall efficiency.
Benefit
Salary: ~RM3.5K - RM7K
AL: Starting from 8 days
SL: 14 / 18 / 22 days
<Other benefits>
• Performance bonus - depends on company and individual performance
• Medical coverage
• Personal insurance
