151个职位: Manufacturing(Electronics/Semiconductors)
MLOps DeveloperID:59835
3,500 MYR ~ 7,000 MYRMalacca工作内容
We are seeking an MLOps specialist to architect the infrastructure that allows our AI models to live and breathe on the factory floor. You will be the bridge between model development and industrial production, ensuring our AI systems are scalable, monitored, and resilient enough for 24/7 manufacturing operations• Model Deployment: Lead the transition of models from Jupyter notebooks into production-ready microservices.• Infrastructure Automation: Build and manage the infrastructure required to support LLMs and RAG pipelines at scale.• Observability: Implement logging and alerting systems to detect "model drift" or accuracy drops caused by changes in factory sensor data.• Security Compliance: Ensure all AI tools and internal chatbots meet enterprise security standards and are integrated with company-wide authentication.• Scalability: Optimize AI services to handle high-frequency data from multiple production lines simultaneously.
福利制度
Salary: ~RM3.5K - RM7K
AL: Starting from 8 days
SL: 14 / 18 / 22 days
<Other benefits>
• Performance bonus - depends on company and individual performance
• Medical coverage
• Personal insuranceAOI Engineer (SMT) ID:59838
3,500 MYR ~ 7,000 MYRMalacca工作内容
Automated Optical Inspection (AOI) engineers use specialized cameras, lighting, and image processing algorithms to develop and implement automated systems for detecting defects in manufactured products, particularly printed circuit boards (PCBs), ensuring quality and consistency.Their work involves designing vision systems, training machine learning models to identify flaws, and integrating these systems into production lines to minimize human error and improve manufacturing throughput.• Overcomes manual inspection limitations: AOI systems are faster and more accurate than manual inspection, which is time-consumingand prone to human error.• Ensures precision: Critical for inspecting complex electronics glazed substrate sheets at high speed and high volume• Reduces costs and errors: By catching defects early, AOI reduces rework, minimizes customer returns, and improves overall manufacturing efficiency leading to improved customer delivery• Develops inspection systems: AOI engineers design and build and operate the high-speed camera systems, lighting, and software that power AOI machines.• Programs vision algorithms: Write and refine algorithms that analyze captured images, compare them against a "golden standard" (a perfect reference) and flag any discrepancies.• Implements machine learning: They train machine learning models, including neural networks, to recognize various defects• Integrates systems into manufacturing: integrate these systems into production lines to inspect products at various stages• Enhances quality control: Objective is to provide automated, rapid, and accurate inspection, to ensure higherproduct quality and consistency.• Defect detection: Identifying surface-level issues and trace irregularities.• System calibration and validation: Ensuring the AOI systems are accurate and producing reliable results.• Troubleshooting: Resolving issues with the inspection system or identifying the root causes of recurring defects.• Collaboration: Working with cross-functional teams of engineers and technicians to resolve quality issues.
福利制度
Salary: ~RM3.5K - RM7K
AL: Starting from 8 days
SL: 14 / 18 / 22 days
<Other benefits>
• Performance bonus - depends on company and individual performance
• Medical coverage
• Personal insuranceAI EngineerID:59825
3,500 MYR ~ 7,000 MYRMalacca工作内容
We are looking for a high-potential AI Engineer to help us build "smart" factory systems. • AI Strategy Support: Help contribute to our 3-year roadmap as we move toward autonomous, self-adjusting factory operations.• Data Connections: Help design automated pipelines using SQL Server to connect factory machines and sensors into our central AI system.• Building RAG Systems: Assist in designing and deploying RAG pipelines for our internal AI chatbots to ensure they provide accurate information.• MLOps & Deployment: Work on the full lifecycle of AI models—from development to the factory floor—ensuring they stay accurate and secure.• Collaboration: Work closely with senior engineers and help explain AI results to management and international stakeholders.
福利制度
Salary: ~RM3.5K - RM7K
AL: Starting from 8 days
SL: 14 / 18 / 22 days
<Other benefits>
• Performance bonus - depends on company and individual performance
• Medical coverage
• Personal insuranceFull-Stack DeveloperID:59823
3,500 MYR ~ 7,000 MYRMalacca工作内容
We are looking for an experienced Full Stack Developer to join our growing technology team. This role is ideal for someone who enjoys building scalable, high-performance web applications and solving real-world business challenges using modern technologies.You will work closely with cross-functional teams to design, develop, and deliver reliable, user-friendly digital solutions.• Design, develop, and maintain scalable full-stack web applications• Build responsive front-end interfaces using React.js• Develop robust back-end services and APIs using Java and Spring Boot• Integrate RESTful APIs and third-party services• Collaborate with product managers, designers, and other developers to deliver high-quality solutions• Optimize applications for performance, scalability, and security• Troubleshoot, debug, and enhance existing systems• Participate in code reviews and contribute to best practicesFramework: • Framework : .Net Framework 2.0/3.5/4.0/4.5,4.8, .Netcore 8• Programming Languages : C#, ASP.Net MVC 5.0, ADO .NET, Enterprise Libraries,• WCF Webservices, REST API’s, ASP .NETCore, Angular• Scripting languages : Java Script, JQuery, Bootstrap• Internet Technology : HTML,XML, XSLT• Oracle Tools : SQL*PLUS, SQL *Loader, UTL File• Front End Tools : Visual Studio 2005/2008/2010/2015/2017/2019,2022,• Developer 2000(Forms & Reports) 6i• Other Tools : Postman, SoapUI, Winscp, Filezilla• Database : SQL SERVER 2017/2026• Experience in Store Procedure• Operating Systems : Windows• Create Job in SQL• Create Function In SQL
福利制度
Salary: ~RM3.5K - RM7K
AL: Starting from 8 days
SL: 14 / 18 / 22 days
<Other benefits>
• Performance bonus - depends on company and individual performance
• Medical coverage
• Personal insuranceData EngineerID:59826
3,500 MYR ~ 7,000 MYRMalacca工作内容
We are looking for a Data Engineer to build the "nervous system" of our factory. You will be responsible for the massive task of connecting physical machines, sensors, and legacy databases into a clean, high-speed data stream that powers our AI models and autonomous decision-making.• Data Ingestion: Lead the design of pipelines that ingest data from SQL Server (e.g., FurnaceTempDB) and factory sensors into a centralized AI-ready format.• Data Quality & Governance: Ensure the data fed into AI models is clean, timestamped accurately, and structured correctly for tasks like "after-firing"dimension prediction.• System Reliability: Maintain 99.9% uptime for data pipelines; if the data stops, the autonomous factory stops.• Storage Strategy: Manage the lifecycle of manufacturing data, balancing the need for "hot" real-time data for AI and "cold" historical data for long-term trend analysis.• Collaboration: Work closely with AI Engineers to provide custom "feature sets" and ensure the RAG system has access to the latest internal documents.
福利制度
Salary: ~RM3.5K - RM7K
AL: Starting from 8 days
SL: 14 / 18 / 22 days
<Other benefits>
• Performance bonus - depends on company and individual performance
• Medical coverage
• Personal insuranceFirmware EngineerID:59789
3,800 MYR ~ 6,800 MYRShah Alam工作内容
- Develop firmware programming for indoor and outdoor units of air-conditioner models using C Programming Language and Assembly Language. - Evaluate the developed firmware program through various stages of detailed testing, debugging, simulation and actual unit testing. - Build simple test circuits to evaluate the program through simulation. - Prepare documentation for the developed firmware programming. - Build Strong teamwork between inter-related R&D sections in developing air-conditioner models
福利制度
-Salary: RM3,800 - 6,800
- Annual Leave (15 days)
- Medical Leave (14 days)
- EPF & Sosco,
- Medical Insurance
- Group Term Life Insurance
- Free Parking
- Inhouse Cafeteria
- Inhouse Clinic
- Annual Increment
- Bonus (subject to company performance)Advanced Package & Board Team (Senior/Staff/Principal)ID:59718
10,000 MYR ~ 30,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
The Advanced Package & Board Team will lead the design, development, and implementation of advanced IC packaging and board-level solutions that enable high-performance, cost-effective, and reliable silicon products. This role requires strong technical leadership across multiple engineering domains — including substrate/interposer design, board design, SI/PI/thermal analysis, and manufacturing interface — while driving cross-functional collaboration with silicon design, system architecture, and OSAT/EMS partners.The successful candidate will define and execute the company’s packaging and board technology roadmap to support next-generation chiplet-based architectures, 2.5D/3D integration, and heterogeneous systems.Key Responsibilities1. Leadership & Strategy• Lead the Advanced Package & Board Design Team, including substrate, interposer, and PCB design engineers.• Define and execute packaging and board technology strategy aligned with company silicon product roadmap.• Establish design and verification methodologies for advanced packaging (e.g., 2.5D, fan-out, chiplet integration).• Drive innovation in thermal management, signal integrity, and power delivery optimization.2. Technical Execution• Oversee design and validation of interposers, substrates, and system boards from concept to production release.• Guide integration of chiplets, HBM, and passive components using state-of-the-art packaging technologies.• Ensure robust SI/PI, mechanical, and thermal analysis for design sign-off.• Collaborate with silicon design teams on bump assignment, die floorplanning, and package co-design.• Manage board-level design for system bring-up, test platforms, and reference designs.3. Supplier & Ecosystem Management• Engage and qualify OSATs, substrate vendors, and PCB manufacturers to ensure quality and yield.• Partner with EDA vendors to establish design automation flow and DRC verification.• Drive technology transfer and pilot runs with manufacturing partners.4. Project & People Management• Plan resources, schedules, and budgets to ensure timely delivery of packaging and board design projects.• Build and mentor a high-performing team with expertise across electrical, mechanical, and materials engineering.• Foster collaboration across silicon, test, reliability, and operations teams.
福利制度
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementCustomer Engineer (Melaka) - Grinder ID:59685
3,000 MYR ~ 4,500 MYRMalacca工作内容
- As first responder for all machine issues (machine installation, troubleshooting, maintenance)- Conduct machine training (operation, maintenance, basic application) to customer (engineer, technician and operator)- Provide guidance to engineer/operator/technician on how to fully utilize machine and its integrated function, to maximize machine performance capability- Plan, schedule and execute machine improvement activities (MTBA, OEE improvements, error reductions, conduct preventive maintenance)- Act as technical/engineering interface for Sales and Application members
福利制度
- AL: Starting from 14 days
- MC: Starting from 14 days
- EPF, SOCSO, EIS
- Car Allowance
- 13th Month Bonus
- Mileage Claim (overseas/other state)
- Health Screening
- Dental
- Company tripSenior Standard Cell Design EngineerID:59656
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
We are seeking a Library Design Engineer to own the end-to-end development of a production-grade standard cell library on leading-edge process nodes. You will drive transistor-level design, multi-Vt cell topology, full characterization, and PPA validation delivering robust, sign-off-ready library views to downstream implementation flows. Seniority level to be determined by experience.Key Responsibilities• Design, simulate, and analyze standard cell circuits at transistor level, including combinational, sequential, clock, and physical utility cells across multiple Vt flavors (HVT/SVT/LVT/ULVT) and drive strengths.• Perform layout process-node-shift; guide layout clean-up effort and review for DRC/LVS compliance, EM/IR rules, and parasitic awareness at the cell level.• Define & execute characterization flow to generate complete library views & models, covering timing (NLDM/CCS/ECSM), power (dynamic, leakage, internal), noise, and variation-aware models (LVF/SOCV/POCV); ensure Liberty, LEF, and GDS consistency.• Define & execute QA regression to check library quality; validate cell robustness including noise margin, drive strength, X-propagation, and scan/DFT cell correctness; drive STA correlation using PrimeTime or Tempus to confirm model accuracy in real PD flows.• Lead standard cell library IP integration into Testchip, including Testchip circuit and test plan development; support hardware bring-up and debug.• Perform pre/post-silicon correlation & model/design optimization; drive root-cause analysis for first-silicon issues and implement yield/robustness improvements.
福利制度
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSenior Analog Circuit Design Engineer (Clocking)ID:59653
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. The candidate should have specialized expertise in Clocking as described below. Seniority level to be determined by experience.Key Responsibilities• Design and debug PLL/DLL architectures and circuits (integer/fractional-N; analog or digital-assisted).• Oscillators: LC or ring-oscillator (RO) VCO/DCO, frequency synthesis, phase noise/jitter analysis and budgeting.• Delay lines, measurement/ruler circuitry, phase interpolators, and calibration/trim techniques.• DCC/DCM/DCA, clock tree/distribution, and clock management units; low-jitter clock generation and distribution networks.• Own end-to-end block/IP delivery: architecture studies, specification, transistor-level design, simulation, post-layout sign-off, and silicon bring-up/characterization.• Behavioral modeling (e.g., Verilog-A/SystemVerilog) to explore loop dynamics, spur/jitter mitigation and system interactions.• Build verification test benches; validate performance across PVT corners, mismatch/Monte Carlo (as applicable), and post-extraction parasitics.• Work closely with layout/mask designers: floorplanning guidance, layout reviews, and ensuring LVS/DRC clean implementation and parasitic awareness.• Meet quality and reliability requirements (e.g., EM/IR, aging/overstress); contribute to robust design methodology and sign-off checklists.• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.
福利制度
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment
