Senior Staff IP Logic Design / MicroarchitectID:58605
15,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong約15時間 前概要
給与
15,000 MYR ~ 22,000 MYR
業界
Software/Information Processing, IT/Telecommunications, Manufacturing(Computer/Telecommunication), Manufacturing(Electronics/Semiconductors)
仕事内容
The Senior IP Logic Design Engineer will be responsible for the design and implementation of logic design, microarchitecture definition, RTL coding, IP releases, high speed timing convergence, and collaboration with cross-functional teams to meet project specifications. Tasks also include performance optimization and ensuring design functionality through verification and validation processes.
Key Responsibilities:
1. IP Design Responsibility
• Define and design Unit Level / Layer Level IP Design that able to converge timing at high end process node, with high frequency requirements.
• Ability to drive a low power and complex design to completions.
2. IP Quality Responsibility
• Ability to orchestrate the team on validation requirements to catch all possible boundary conditions of logic bugs.
3. IP Releases
• Deep knowledge on Lint and CDC flow and ability to drive the Lint and CDC convergence.
求めている人材
応募条件
• Bachelor's or Master's degree in Electronics Engineering, Computer Engineering, or related field.
• Experience in the semiconductor industry for Minimum >10 year’s experience in high-speed digital logic design.
• Strong skills in Logic Design and RTL Coding with Verilog or system Verilog.
• Experience in high-speed timing convergence in various process node.
• Deep understanding of Computer Architecture, memory traffic, io controller such as PCIe or UCIe.
• Excellent problem-solving abilities and attention to details.
• Ability to work collaboratively with cross-functional teams for project completions.
• Ability to execute various IP design tools such as CDC, Lintra, FEV, etc.英語
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その他言語
English
その他
福利厚生
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment就業時間
8am ~ 5pm
休日
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職種
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