167个职位
Sr Analog Circuit Design Engineer (General Purpose I/O) (GPIO)ID:59654
8,000 MYR ~ 16,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. The candidate should have specialized expertise in GPIO (General Purpose I/O) design as described below. Seniority level to be determined by experience.Key Responsibilities• Own GPIO IP architecture/specs: bidirectional I/O, mixed-voltage/failsafe tolerance, programmable drive strength & slew-rate control, Schmitt-trigger inputs, pull-up/pull-down, bus-keeper/retention, and pad-ring support cells (supply, corner, filler, terminator/diode-breaker, cut cells).• Design and implement transistor-level GPIO circuits: input receiver, output driver, level shifters, predrivers, reference/compensation sub-blocks, analog test hooks.• Ensure robust reliability and quality signoff for I/O cells and rings (ESD, latch-up, EM/IR, aging, overstress, noise immunity and ground-bounce/SSN considerations).• Run comprehensive simulations and verification (PVT corners/Monte Carlo, pre- and post-layout, worst-case timing and functional modes) and drive design reviews with clear documentation.• Develop and release collateral for IP enablement: datasheets, integration guidelines, characterization reports, and models (SPICE/Verilog-A, and IBIS where applicable).• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.• Perform SI/PI and I/O behavior checks at the package/board interface level; support IBIS-based signoff and customer debug as needed.
福利制度
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSr Analog Circuit Design Engineer (Clocking)ID:59653
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. The candidate should have specialized expertise in Clocking as described below. Seniority level to be determined by experience.Key Responsibilities• Design and debug PLL/DLL architectures and circuits (integer/fractional-N; analog or digital-assisted).• Oscillators: LC or ring-oscillator (RO) VCO/DCO, frequency synthesis, phase noise/jitter analysis and budgeting.• Delay lines, measurement/ruler circuitry, phase interpolators, and calibration/trim techniques.• DCC/DCM/DCA, clock tree/distribution, and clock management units; low-jitter clock generation and distribution networks.• Own end-to-end block/IP delivery: architecture studies, specification, transistor-level design, simulation, post-layout sign-off, and silicon bring-up/characterization.• Behavioral modeling (e.g., Verilog-A/SystemVerilog) to explore loop dynamics, spur/jitter mitigation and system interactions.• Build verification test benches; validate performance across PVT corners, mismatch/Monte Carlo (as applicable), and post-extraction parasitics.• Work closely with layout/mask designers: floorplanning guidance, layout reviews, and ensuring LVS/DRC clean implementation and parasitic awareness.• Meet quality and reliability requirements (e.g., EM/IR, aging/overstress); contribute to robust design methodology and sign-off checklists.• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.
福利制度
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSr Analog Circuit Design Engineer (High-Speed I/O)ID:59652
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. The candidate should have specialized expertise in High-Speed I/O as described below. Seniority level to be determined by experience.Key Responsibilities• Design TX/RX, analog front-end, serializers/deserializers, high-speed level shifters, predrivers/drivers, and termination/impedance calibration blocks.• Equalization: Feed-Forward Equalization (FFE), DFE, CTLE and related adaptation/control loops.• Clocking support for links (e.g., CDR interactions, low-jitter clock generation/distribution as needed by PHY).• SI analysis and creation/validation of IBIS/IBIS-AMI models; channel characterization (insertion loss, return loss, crosstalk) and eye diagram margin assessment.• Own end-to-end block/IP delivery: architecture studies, specification, transistor-level design, simulation, post-layout sign-off, and silicon bring-up/characterization.• Build verification test benches; validate performance across PVT corners, mismatch/Monte Carlo (as applicable), and post-extraction parasitics.• Work closely with layout/mask designers: floorplanning guidance, layout reviews, and ensuring LVS/DRC clean implementation and parasitic awareness.• Support interface integration and sign-off: PPA optimization, reliability checks (e.g., EM/IR, aging/overstress), and timing closure collaboration.• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.
福利制度
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly IncrementSr Analog Circuit Design Engineer (Pure Analog)ID:59651
10,000 MYR ~ 22,000 MYRBayan Lepas, Bayan Baru, Bandar Sunway/Puchong工作内容
We are seeking a Circuit/Analog Design Engineer to develop high-performance analog/mixed-signal IPs from architecture through tapeout and silicon bring-up. Seniority level to be determined by experience.Key Responsibilities• Reference generation: bandgap, bias circuits, reference voltages/currents; high-accuracy, low-noise design techniques.• Low offset / low-noise voltage regulators (LDO) and stability/compensation networks; PSRR and transient response optimization.• Voltage and power monitoring circuits: droop detection, voltage detectors, PowerGood and POR generation, analog sensing, and housekeeping blocks.• Power-management components, linear and/or switching-adjacent blocks, charge pumps, as applicable to the SoC/PHY environment.• Design/support ADC/DAC blocks and associated analog support circuits (sampling, references, amplifiers/comparators, clocking).• Voltage and temperature sensor design and characterization. Bandgap and PTAT-based temperature sensing; process corner detection circuits. Sensor readout, digitization, and calibration techniques.• Own end-to-end block/IP delivery: architecture studies, specification, transistor-level design, simulation, post-layout sign-off, and silicon bring-up/characterization.• Build verification test benches; validate performance across PVT corners, mismatch/Monte Carlo (as applicable), and post-extraction parasitics.• Work closely with layout/mask designers: floorplanning guidance, layout reviews, and ensuring LVS/DRC clean implementation and parasitic awareness.• Meet quality and reliability requirements (e.g., EM/IR, aging/overstress); contribute to robust design methodology and sign-off checklists.• Support IP integration on to Testchip as well as post-silicon evaluation including correlation with simulation and root-cause analysis for first-silicon bring-up.
福利制度
- Annual Leave 14 days
- Medical Leave 14 days
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment【Penang】 Senior Sales ExecutiveID:59632
4,600 MYR ~ 6,000 MYRGelugur, Jelutong工作内容
【Job Responsibilities】• Product handle is Electronic component product• To handle and serve Global Distributors business for E&E (Global Distributors : Avnet, TTI, Future, Arrow ) • Manage and grow existing key accounts through strong relationships and continuous engagement.• Work closely with technical teams to deliver product demonstrations, troubleshooting, and technical presentations.• Collaborate with supply chain and operations teams to manage lead times, product availability, and customer delivery schedules.• Prepare sales forecasts, pipeline updates, and monthly business reports.• Provide timely solutions to customer requirements and coordinate after sales support.
福利制度
Salary range: ~RM4.6K - RM6K
- Annual Leave
- Medical Leave
- Transport Allowance
- Transport to Client Visit (Claimable)
- Company Parking
- Bonus (Depends company performance - avg 2 months)
- Other benefits will be disclose during interview session.
- No sales commissionSenior Frontend EngineerID:59631
7,000 MYR ~ 9,000 MYRSeri Petaling, Bandar Sunway/Puchong, Kota Damansara/Petaling Jaya工作内容
We are looking for a highly skilled Senior Frontend Engineer to lead the design, development, and maintenance of our web interfaces. This role requires a blend of technical mastery, leadership, and a deep understanding of the full Software Development Life Cycle (SDLC). The ideal candidate will bridge the gap between design and implementation, ensuring a seamless user experience across all platforms.Key Responsibilities1. Frontend Development & Delivery• Design, develop, and maintain clean, reusable, and scalable frontend code.• Drive the full Software Development Life Cycle (SDLC), from initial requirement gathering to deployment and maintenance.• Build responsive, accessible, and high-performance UIs to ensure a seamless experience across all modern browsers and devices.• Develop unit tests and maintain high code quality standards to meet project deadlines.• Contribute to and optimize CI/CD pipelines and automated build/deployment processes.2. Technical Leadership & Ownership• Take full ownership of assigned frontend projects, managing priorities across multiple workstreams.• Provide expert input on UI/UX architecture and solution strategies aligned with business goals.• Support architectural decisions with a focus on scalability, security, and performance.• Continuously improve development processes, tools, and frontend standards.3. Collaboration & Mentoring• Work closely with backend engineers, designers, and cross-functional teams to ensure effective integration.• Provide coaching and technical guidance to junior frontend team members.
福利制度
- Annual Leave: 14 days
- Medical Leave: 14 days
- Parking allowance: RM100
- Medical and dental claims: RM2000/year
- Medical insurance
- Performance bonusHR and General Affairs (GA) ManagerID:59359
7,000 MYR ~ 10,000 MYRKlang工作内容
Job PurposeTo lead and manage the full spectrum of Human Resources and General Affairs functions across both office and factory environments, ensuring compliance, operational efficiency, and employee well-being. This role is pivotal in aligning HR strategies with business goals while maintaining a productive and harmonious workplace.ResponsibilitiesRecruitment & Hiring:- Manage job postings, resume screening, and interview coordination.- Oversee employment contracts and pre-employment medical checkups.- Ensure smooth onboarding procedures and documentation.Training & Development:- Organize employee orientation and training programs.- Coordinate HRCorp grant applications and maintain training records.Payroll & Tax Reporting:- Supervise payroll input and verification.- Ensure timely tax submissions (Form E & BE).- Monitor leave applications and balances.HR Policies & Appraisals:- Lead performance appraisal cycles and bonus distribution.- Conduct probation reviews and manage contract renewals.- Plan and implement salary increments.- Update and communicate HR policies.Employee Discipline:- Track attendance and manage disciplinary actions.- Conduct counselling sessions and issue formal warnings.Employee Welfare:- Monitor and verify employee's welfare affairsHR Administration:- Handle HR correspondence and staff movement tracking.- Manage ID setup, uniform distribution, and HR reporting (KPI, OT, absenteeism).- Arrange travel and accommodations for staff and visitors.- Manage procurement and outsourcing of office supplies and services.ISO / RBA Support:- Prepare and maintain HR documentation for ISO audits and compliance.- Prepare documentation and reports for RBA compliance and audits.General Affairs (GA)Foreign Worker Management:- Oversee permit and passport renewals, hostel agreements, and quota applications.- Coordinate medical checkups and CLQ documentation for foreign workers.Vendor/Facility Coordination:- Source and manage outsourcing companies and contracts.- Oversee health checks, pantry supplies, and cleaning services.- Handle vehicle renewals (road tax, APAD, insurance) and maintenance.- Manage company cars and ensure regular inspections and repairs.Government & Banking Liaison:- Submit and collect documents from government agencies.- Handle cheque deposits, withdrawals, and online purchases (vouchers, groceries).- Manage stamp duty, license renewals, and submissions to KWSP/Perkeso.
福利制度
- Attendance allowance: RM100
- Handphone Claim : RM200 max per month
- Benefits (Bonuses / Allowances) – 2 months’ contractual bonus, lunch provide in canteen but limited choice, GHS & GPA, Medical Expenses entitlement RM1200 per annum, Birthday Gift RM100 cash.
- Annual leave days – 10 days (below 2 yrs), 12 days (2 years/more), 13 days (3 years/more), 14 days (4 years/more), 16 days (5 years/more)
- Group Insurance Coverage : GHS & GPA
- Safety Award : Long Service and Safety Award【Johor】Assistant Manager - R&DID:59295
6,000 MYR ~ 9,000 MYRJohor Bahru工作内容
As an R&D Assistant Manager, you will be the technical lead in polymer science, specifically focusing on raw material innovation and product development to support our growth as a leading thermoforming manufacturer in Asia.•Conduct research and development on polymer materials, focusing on Polypropylene (PP), PET, and other sustainable resins.•Proactively lead product development projects by understanding and leveraging material characteristics to meet market demands.•Work closely with the production team to optimize material formulations for the vacuum forming process.Perform testing and analysis on resin properties to ensure high-quality output for our "Benxon" brand products.
福利制度
<Benefits>
- AL : starts from 14 days (subject to change, maximum 21 days more than 5 years of services)
- MC : starts from 14 days (subject to change, maximum 22 days more than 5 years of services)
- Bonus : twice a year (subject to company and individual performance)
- Medical Benefits : Unlimited outpatient treatment at Panel Clinics (Up to RM 80 per visit).
Relocation Support : Negotiable on a case-by-case basis (No fixed policy; please consult during the interview).Project ManagerID:59617
8,000 MYR ~ 13,000 MYRSeri Petaling工作内容
• Manage the planning, organizing and implementation of complex strategic project/initiatives• Monitor of Project Implementation Plan of overall works• Review progress against plans, reporting progress and result to the Management• Lead and coordinate project team to eliminate the obstacle as well as mentoring the team to improve project approach, process and implementation• Develop and monitoring project plan and track project milestones with appropriate process to ensure the project runs according to schedule and budget• Planning work program of project and monitoring stage completion• Monitoring inspections and test are carried out in accordance to the contract specification• Coordinate, review and submission of progress payment to the customer and facilitate timely certification of sub-contractor claims• To liaise with Client• Co-ordinate interfacing activities works of various sub-contractors• Perform other duties as assigned from time to time
福利制度
1) Annual Leave
(<2 years @ 14 days)
(2-5 years @ 17 days)
(>5 years @ 20 days)
2) Medical Leave
(<2 years @ 14 days)
(2-5 years @ 18 days)
(>5 years @ 22 days)
3) Medical Claims (RM800/year) at panel clinic
4) Dental claim (RM300/year)
5) Insurance (after confirmation)
6) Mobile Phone claim (up to RM120)
7) Mileage, parking & toll claim – for site visit/meeting clientB0 Chargeman (11kV) (Bentong)ID:59595
10,000 MYR ~ 13,000 MYRPahang工作内容
- Supervising and coordinating the work of electrical technicians and assistants- Ensuring the proper maintenance and servicing of electrical equipment and systems- Monitoring and troubleshooting electrical systems to identify and resolve any issues- Conducting regular inspections and testing to ensure the safety and reliability of electrical installations- Implementing and enforcing safety protocols and procedures to protect personnel and assets- Maintaining detailed records and documentation of all electrical work and maintenance activities- Collaborating with other departments to coordinate the integration of electrical systems with other plant operations
福利制度
- Annual Leave 12 days
- 13th months salary
- Accommodation provided
- Higher than industry average performance bonus
- Outpatient Medical (including spouse and dependent) and Dental benefit (Employee only)
- Group hospitalization (including spouse and dependent) and Group Personal Accident (Employee only)
- Public holiday falls on a Saturday, one day is credited to the leave credits