概要
給与
8,000 MYR ~ 19,000 MYR
業界
Software/Information Processing, IT/Telecommunications, Manufacturing(Computer/Telecommunication), Manufacturing(Electronics/Semiconductors)
仕事内容
We are seeking a Silicon Validation Engineer to lead silicon bring-up and post-silicon characterization of new Testchips. This hands-on lab role drives test development, automation, data analysis, and cross-team debug closure from power-on to characterization sign-off.
Key Responsibilities
• Lead Day-0/Day-1 bring-up: safe power-up, clocks/resets, basic access, and smoke tests on first silicon.
• Define and execute post-silicon validation/characterization plans with clear milestones and pass/fail criteria.
• Develop and deploy silicon tests (bare-metal/low-level software) and maintain repeatable test procedures.
• Build automation for test execution, data capture, and regression (Python preferred).
• Collect and analyze characterization data (e.g., performance, power, voltage/temperature margins); summarize trends and anomalies.
• Triage and debug silicon failures; drive root-cause with design/verification/firmware teams and validate fixes/workarounds.
• Improve debug efficiency by proposing/leveraging on-chip observability (registers, counters, logs) and lab measurement methods.
• Document lab setup, test methods, results, and silicon errata; create silicon reports; communicate status, risks, and recommendations.
• Define specifications for eval/char boards.
求めている人材
応募条件
• BS/MS in Electrical/Computer Engineering (or equivalent)
• Typically 5-10+ years in post-silicon bring-up/validation/characterization.
• Strong digital/SOC fundamentals: clocks/resets, power domains, low-level debug, and system-level interactions.
• Hands-on lab proficiency with common instruments (oscilloscope, logic/protocol analyzer, programmable supplies/SMU, thermal tools).
• Experience with debug/control interfaces (e.g., JTAG, UART, SPI, 12C) and register-level bring-up.
• Scripting/automation: strong Python; working knowledge of C/C++ and Linux toolchains.
• Excellent problem solving, clear documentation, and cross-functional communication.
Preferred / Nice-to-Have Experience
• Experience with MPW shuttle silicon or early prototypes where observability is limited.
• Experience correlating silicon results to models/specs and driving updates to test methods and debug features.
• Familiarity with power integrity effects (noise/IR-drop) on measurements and how to control them in experiments.英語
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その他言語
English
その他
福利厚生
- Annual Leave
- Medical Leave
- Medical Insurance
- Dental/Optical RM500/year
- Outpatient RM1000/year
- Performance Bonus
- Yearly Increment就業時間
8am ~ 5pm
休日
Follow Malaysia PH
職種
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