Senior/Staff/Principal Engineer, Circuit DesignID:59444

6,500 MYR ~ 8,500 MYRバヤン・レパス Bayan Lepas約17時間 前

概要

  • 給与

    6,500 MYR ~ 8,500 MYR

  • 業界

    Software/Information Processing, IT/Telecommunications, Manufacturing(Computer/Telecommunication), Manufacturing(Electronics/Semiconductors)

  • 仕事内容

    • Design and implement high speed interfaces and complex mixed-signal circuits using cutting-edge CMOS tech and EDA tools.
    • Design block IO blocks such as compensation circuit, reference voltage, transmitters and receivers.
    • Sub blocks include and not confined to , high speed serializers and deserializers, high speed levelshifters , predrivers , drivers , Feed Forward Equalization , DFE , CTLE.
    • Block to pass rigorous quality and reliability like EM-IR , Aging , Overstress
    • Run initial SI analysis and IBIS/IBIS-AMI creations.
    • Timing closure using Prime-Time or equivalent methods.
    • Work on serial and parallel interfaces.
    • Work closely with mask designers to deliver the physical design and assist with silicon evaluation.
    • Perform architecture studies, circuit designs & simulations, floor-planning, instructing mask designers, reliability verifications and silicon bring-up.

求めている人材

  • 応募条件

    • Degree/Master/PHD in Electrical and Electronics.
    • Minimum 5-10 years of professional working experience in IO circuit design.
    • Proficient in circuit design using FinFet tech and EDA tools.
    • Experienced in IO circuits not limited to DDR4/5/6 , HBM3/4, LPDDR4/5X, UCIE, MIPI, LVDS
    • Worked in serial and or parallel interfaces.
    • Have understanding in transistor operations.
    • Able to work closely with Mask/Layout designers to enable physical design.
    • Skilled in teamwork and mentorship.
    • Architecture involvement for senior role.

  • 英語

    -

  • その他言語

    English

その他